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authorSantosh Shilimkar <santosh.shilimkar@ti.com>2012-08-13 14:39:03 +0530
committerSantosh Shilimkar <santosh.shilimkar@ti.com>2012-09-19 13:00:37 +0530
commit3c7c5dab44d6c8861bc86dab924353d8d40344f8 (patch)
tree43925a23bdd177836d4428710c4cb8b05af7009c /arch/arm/mach-omap2/timer.c
parentfa6d79d27614223d82418023b7f5300f1a1530d3 (diff)
ARM: OMAP5: Enable arch timer support
Enable Cortex A15 generic timer support for OMAP5 based SOCs. The CPU local timers run on the free running real time counter clock. Acked-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/timer.c')
-rw-r--r--arch/arm/mach-omap2/timer.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 026fcfff669..2c5a45d8ca8 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -41,6 +41,7 @@
#include <plat/dmtimer.h>
#include <asm/smp_twd.h>
#include <asm/sched_clock.h>
+#include <asm/arch_timer.h>
#include "common.h"
#include <plat/omap_hwmod.h>
#include <plat/omap_device.h>
@@ -488,9 +489,15 @@ OMAP_SYS_TIMER(4)
#ifdef CONFIG_SOC_OMAP5
static void __init omap5_timer_init(void)
{
+ int err;
+
omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE);
omap2_clocksource_init(2, OMAP4_MPU_SOURCE);
realtime_counter_init();
+
+ err = arch_timer_of_register();
+ if (err)
+ pr_err("%s: arch_timer_register failed %d\n", __func__, err);
}
OMAP_SYS_TIMER(5)
#endif