diff options
author | Lennert Buytenhek <buytenh@wantstofly.org> | 2008-04-25 16:31:32 -0400 |
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committer | Nicolas Pitre <nico@cam.org> | 2008-04-28 15:59:19 -0400 |
commit | b46926bb2d9977799c88aef17a4386ee02c326d8 (patch) | |
tree | 39bd519e97568d13c141d41457519de37ef4bbe6 /arch/arm/mach-orion5x/addr-map.c | |
parent | 994cab846422bc9c636cc780a48b7370e837a3bb (diff) |
[ARM] Orion: catch a couple more alternative spellings of PCIe
Unify a couple more spellings of "PCIe" ("PCI-E", "PCIE".)
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Diffstat (limited to 'arch/arm/mach-orion5x/addr-map.c')
-rw-r--r-- | arch/arm/mach-orion5x/addr-map.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-orion5x/addr-map.c b/arch/arm/mach-orion5x/addr-map.c index 6b179371e0a..9608503d67f 100644 --- a/arch/arm/mach-orion5x/addr-map.c +++ b/arch/arm/mach-orion5x/addr-map.c @@ -19,14 +19,14 @@ /* * The Orion has fully programable address map. There's a separate address - * map for each of the device _master_ interfaces, e.g. CPU, PCI, PCIE, USB, + * map for each of the device _master_ interfaces, e.g. CPU, PCI, PCIe, USB, * Gigabit Ethernet, DMA/XOR engines, etc. Each interface has its own * address decode windows that allow it to access any of the Orion resources. * * CPU address decoding -- * Linux assumes that it is the boot loader that already setup the access to * DDR and internal registers. - * Setup access to PCI and PCI-E IO/MEM space is issued by this file. + * Setup access to PCI and PCIe IO/MEM space is issued by this file. * Setup access to various devices located on the device bus interface (e.g. * flashes, RTC, etc) should be issued by machine-setup.c according to * specific board population (by using orion5x_setup_*_win()). |