diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2008-07-14 16:06:58 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-07-14 16:06:58 -0700 |
commit | 85082fd7cbe3173198aac0eb5e85ab1edcc6352c (patch) | |
tree | edbc09b7945994f78668d218fa02e991c3b3b365 /arch/arm/mach-orion5x/irq.c | |
parent | 666484f0250db2e016948d63b3ef33e202e3b8d0 (diff) | |
parent | 53ffe3b440aa85af6fc4eda09b2d44bcdd312d4d (diff) |
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (241 commits)
[ARM] 5171/1: ep93xx: fix compilation of modules using clocks
[ARM] 5133/2: at91sam9g20 defconfig file
[ARM] 5130/4: Support for the at91sam9g20
[ARM] 5160/1: IOP3XX: gpio/gpiolib support
[ARM] at91: Fix NAND FLASH timings for at91sam9x evaluation kits.
[ARM] 5084/1: zylonite: Register AC97 device
[ARM] 5085/2: PXA: Move AC97 over to the new central device declaration model
[ARM] 5120/1: pxa: correct platform driver names for PXA25x and PXA27x UDC drivers
[ARM] 5147/1: pxaficp_ir: drop pxa_gpio_mode calls, as pin setting
[ARM] 5145/1: PXA2xx: provide api to control IrDA pins state
[ARM] 5144/1: pxaficp_ir: cleanup includes
[ARM] pxa: remove pxa_set_cken()
[ARM] pxa: allow clk aliases
[ARM] Feroceon: don't disable BPU on boot
[ARM] Orion: LED support for HP mv2120
[ARM] Orion: add RD88F5181L-FXO support
[ARM] Orion: add RD88F5181L-GE support
[ARM] Orion: add Netgear WNR854T support
[ARM] s3c2410_defconfig: update for current build
[ARM] Acer n30: Minor style and indentation fixes.
...
Diffstat (limited to 'arch/arm/mach-orion5x/irq.c')
-rw-r--r-- | arch/arm/mach-orion5x/irq.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/arch/arm/mach-orion5x/irq.c b/arch/arm/mach-orion5x/irq.c index dd21f38c5d3..e2a0084ab4a 100644 --- a/arch/arm/mach-orion5x/irq.c +++ b/arch/arm/mach-orion5x/irq.c @@ -82,7 +82,7 @@ static int orion5x_gpio_set_irq_type(u32 irq, u32 type) int pin = irq_to_gpio(irq); struct irq_desc *desc; - if ((orion5x_read(GPIO_IO_CONF) & (1 << pin)) == 0) { + if ((readl(GPIO_IO_CONF) & (1 << pin)) == 0) { printk(KERN_ERR "orion5x_gpio_set_irq_type failed " "(irq %d, pin %d).\n", irq, pin); return -EINVAL; @@ -117,7 +117,7 @@ static int orion5x_gpio_set_irq_type(u32 irq, u32 type) /* * set initial polarity based on current input level */ - if ((orion5x_read(GPIO_IN_POL) ^ orion5x_read(GPIO_DATA_IN)) + if ((readl(GPIO_IN_POL) ^ readl(GPIO_DATA_IN)) & (1 << pin)) orion5x_setbits(GPIO_IN_POL, (1 << pin)); /* falling */ else @@ -149,8 +149,8 @@ static void orion5x_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) BUG_ON(irq < IRQ_ORION5X_GPIO_0_7 || irq > IRQ_ORION5X_GPIO_24_31); offs = (irq - IRQ_ORION5X_GPIO_0_7) * 8; - cause = (orion5x_read(GPIO_DATA_IN) & orion5x_read(GPIO_LEVEL_MASK)) | - (orion5x_read(GPIO_EDGE_CAUSE) & orion5x_read(GPIO_EDGE_MASK)); + cause = (readl(GPIO_DATA_IN) & readl(GPIO_LEVEL_MASK)) | + (readl(GPIO_EDGE_CAUSE) & readl(GPIO_EDGE_MASK)); for (pin = offs; pin < offs + 8; pin++) { if (cause & (1 << pin)) { @@ -158,9 +158,9 @@ static void orion5x_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) desc = irq_desc + irq; if ((desc->status & IRQ_TYPE_SENSE_MASK) == IRQT_BOTHEDGE) { /* Swap polarity (race with GPIO line) */ - u32 polarity = orion5x_read(GPIO_IN_POL); + u32 polarity = readl(GPIO_IN_POL); polarity ^= 1 << pin; - orion5x_write(GPIO_IN_POL, polarity); + writel(polarity, GPIO_IN_POL); } desc_handle_irq(irq, desc); } @@ -175,9 +175,9 @@ static void __init orion5x_init_gpio_irq(void) /* * Mask and clear GPIO IRQ interrupts */ - orion5x_write(GPIO_LEVEL_MASK, 0x0); - orion5x_write(GPIO_EDGE_MASK, 0x0); - orion5x_write(GPIO_EDGE_CAUSE, 0x0); + writel(0x0, GPIO_LEVEL_MASK); + writel(0x0, GPIO_EDGE_MASK); + writel(0x0, GPIO_EDGE_CAUSE); /* * Register chained level handlers for GPIO IRQs by default. |