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authorThomas Gleixner <tglx@linutronix.de>2008-05-16 22:55:26 +0200
committerThomas Gleixner <tglx@linutronix.de>2008-05-17 22:57:20 +0200
commite9623b35599fcdbc00c16535cbefbb4d5578f4ab (patch)
treeba75fcf20f221c3db04aaee49db36c5f73f71622 /arch/arm/mach-pnx4008/i2c.c
parent31f4d870b02e1590260ab7f2a9ff74306bd27e88 (diff)
x86: disable mwait for AMD family 10H/11H CPUs
The previous revert of 0c07ee38c9d4eb081758f5ad14bbffa7197e1aec left out the mwait disable condition for AMD family 10H/11H CPUs. Andreas Herrman said: It depends on the CPU. For AMD CPUs that support MWAIT this is wrong. Family 0x10 and 0x11 CPUs will enter C1 on HLT. Powersavings then depend on a clock divisor and current Pstate of the core. If all cores of a processor are in halt state (C1) the processor can enter the C1E (C1 enhanced) state. If mwait is used this will never happen. Thus HLT saves more power than MWAIT here. It might be best to switch off the mwait flag for these AMD CPU families like it was introduced with commit f039b754714a422959027cb18bb33760eb8153f0 (x86: Don't use MWAIT on AMD Family 10) Re-add the AMD families 10H/11H check and disable the mwait usage for those. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/arm/mach-pnx4008/i2c.c')
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