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authorLei Wen <leiwen@marvell.com>2011-07-14 20:44:33 -0700
committerArtem Bityutskiy <artem.bityutskiy@intel.com>2011-09-11 15:02:15 +0300
commitf3c8cfc237927cc095e8bcb1e3794cfa76390bab (patch)
tree476cb4cde208ef3a661236093f57e1d444f3ce2d /arch/arm/mach-pxa/mxm8x10.c
parentd456882b41b84eba5e729cf78757b8ed95572362 (diff)
mtd: pxa3xx_nand: enable multiple chip select support
Current pxa3xx_nand controller has two chip select which both be workable. This patch enable this feature. Update platform driver to support this feature. Another notice should be taken that: When you want to use this feature, you should not enable the keep configuration feature, for two chip select could be attached with different nand chip. The different page size and timing requirement make the keep configuration impossible. Signed-off-by: Lei Wen <leiwen@marvell.com>
Diffstat (limited to 'arch/arm/mach-pxa/mxm8x10.c')
-rw-r--r--arch/arm/mach-pxa/mxm8x10.c9
1 files changed, 5 insertions, 4 deletions
diff --git a/arch/arm/mach-pxa/mxm8x10.c b/arch/arm/mach-pxa/mxm8x10.c
index b5a8fd3fce0..90928d6e1a5 100644
--- a/arch/arm/mach-pxa/mxm8x10.c
+++ b/arch/arm/mach-pxa/mxm8x10.c
@@ -389,10 +389,11 @@ static struct mtd_partition mxm_8x10_nand_partitions[] = {
};
static struct pxa3xx_nand_platform_data mxm_8x10_nand_info = {
- .enable_arbiter = 1,
- .keep_config = 1,
- .parts = mxm_8x10_nand_partitions,
- .nr_parts = ARRAY_SIZE(mxm_8x10_nand_partitions)
+ .enable_arbiter = 1,
+ .keep_config = 1,
+ .num_cs = 1,
+ .parts[0] = mxm_8x10_nand_partitions,
+ .nr_parts[0] = ARRAY_SIZE(mxm_8x10_nand_partitions)
};
static void __init mxm_8x10_nand_init(void)