diff options
author | Eric Miao <eric.miao@marvell.com> | 2008-09-03 18:06:34 +0800 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-09-26 23:43:20 +0100 |
commit | 5a3d96519040f9736b9f8089e2a1e33a81a6eafe (patch) | |
tree | be92df6b14ba6c9e420bc45d13a76b812991bb0c /arch/arm/mach-pxa/pxa27x.c | |
parent | 4fa7c24e94b3f5bfb367bb847af3c3abd8cca3c0 (diff) |
[ARM] pxa: better MFP low power state support for pxa25x/pxa27x
When configured as a specific low power state: MFP_LPM_DRIVE_LOW,
MFP_LPM_DRIVE_HIGH, the corresponding GPDR register bit during
low power mode shall be re-configured as output (if they are not
configured so), thus the PGSRx bits can output.
Create an additional low power values GPDR registers, and properly
save/restore the GAFR + GPDR registers when doing suspend/resume.
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-pxa/pxa27x.c')
-rw-r--r-- | arch/arm/mach-pxa/pxa27x.c | 37 |
1 files changed, 6 insertions, 31 deletions
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c index f9f6a9c31f4..0288665ad03 100644 --- a/arch/arm/mach-pxa/pxa27x.c +++ b/arch/arm/mach-pxa/pxa27x.c @@ -183,36 +183,18 @@ static struct clk pxa27x_clks[] = { * More ones like CP and general purpose register values are preserved * with the stack pointer in sleep.S. */ -enum { SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2, SLEEP_SAVE_PGSR3, - - SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR0_U, - SLEEP_SAVE_GAFR1_L, SLEEP_SAVE_GAFR1_U, - SLEEP_SAVE_GAFR2_L, SLEEP_SAVE_GAFR2_U, - SLEEP_SAVE_GAFR3_L, SLEEP_SAVE_GAFR3_U, - +enum { SLEEP_SAVE_PSTR, - SLEEP_SAVE_CKEN, - SLEEP_SAVE_MDREFR, - SLEEP_SAVE_PWER, SLEEP_SAVE_PCFR, SLEEP_SAVE_PRER, - SLEEP_SAVE_PFER, SLEEP_SAVE_PKWR, - + SLEEP_SAVE_PCFR, SLEEP_SAVE_COUNT }; void pxa27x_cpu_pm_save(unsigned long *sleep_save) { - SAVE(PGSR0); SAVE(PGSR1); SAVE(PGSR2); SAVE(PGSR3); - - SAVE(GAFR0_L); SAVE(GAFR0_U); - SAVE(GAFR1_L); SAVE(GAFR1_U); - SAVE(GAFR2_L); SAVE(GAFR2_U); - SAVE(GAFR3_L); SAVE(GAFR3_U); - SAVE(MDREFR); - SAVE(PWER); SAVE(PCFR); SAVE(PRER); - SAVE(PFER); SAVE(PKWR); + SAVE(PCFR); SAVE(CKEN); SAVE(PSTR); @@ -223,21 +205,12 @@ void pxa27x_cpu_pm_restore(unsigned long *sleep_save) /* ensure not to come back here if it wasn't intended */ PSPR = 0; - /* restore registers */ - RESTORE(GAFR0_L); RESTORE(GAFR0_U); - RESTORE(GAFR1_L); RESTORE(GAFR1_U); - RESTORE(GAFR2_L); RESTORE(GAFR2_U); - RESTORE(GAFR3_L); RESTORE(GAFR3_U); - RESTORE(PGSR0); RESTORE(PGSR1); RESTORE(PGSR2); RESTORE(PGSR3); - RESTORE(MDREFR); - RESTORE(PWER); RESTORE(PCFR); RESTORE(PRER); - RESTORE(PFER); RESTORE(PKWR); + RESTORE(PCFR); PSSR = PSSR_RDH | PSSR_PH; RESTORE(CKEN); - RESTORE(PSTR); } @@ -376,6 +349,8 @@ static struct sys_device pxa27x_sysdev[] = { { .cls = &pxa_irq_sysclass, }, { + .cls = &pxa2xx_mfp_sysclass, + }, { .cls = &pxa_gpio_sysclass, }, }; |