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authorJoe Perches <joe@perches.com>2011-06-23 11:39:20 -0700
committerJiri Kosina <jkosina@suse.cz>2011-06-24 11:20:14 +0200
commit7c9d440e90c09c6c7b5c477217e491484d044353 (patch)
tree08b3127d8e2ff1e6fd96c0cccef2e01fa0e19678 /arch/arm/mach-pxa
parentdbc6221be7a2bf556fefe75ac939143d4e82ecaf (diff)
treewide: transciever/transceiver spelling fixes
Just tyops. Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Diffstat (limited to 'arch/arm/mach-pxa')
-rw-r--r--arch/arm/mach-pxa/include/mach/corgi.h2
-rw-r--r--arch/arm/mach-pxa/include/mach/pxa27x-udc.h4
2 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/mach-pxa/include/mach/corgi.h b/arch/arm/mach-pxa/include/mach/corgi.h
index 0011055bc3f..5dfd1195a5a 100644
--- a/arch/arm/mach-pxa/include/mach/corgi.h
+++ b/arch/arm/mach-pxa/include/mach/corgi.h
@@ -34,7 +34,7 @@
#define CORGI_GPIO_LCDCON_CS (19) /* LCD Control Chip Select */
#define CORGI_GPIO_MAX1111_CS (20) /* MAX1111 Chip Select */
#define CORGI_GPIO_ADC_TEMP_ON (21) /* Select battery voltage or temperature */
-#define CORGI_GPIO_IR_ON (22) /* Enable IR Transciever */
+#define CORGI_GPIO_IR_ON (22) /* Enable IR Transceiver */
#define CORGI_GPIO_ADS7846_CS (24) /* ADS7846 Chip Select */
#define CORGI_GPIO_SD_PWR (33) /* MMC/SD Power */
#define CORGI_GPIO_CHRG_ON (38) /* Enable battery Charging */
diff --git a/arch/arm/mach-pxa/include/mach/pxa27x-udc.h b/arch/arm/mach-pxa/include/mach/pxa27x-udc.h
index ab1443f8bd8..4cf28f67070 100644
--- a/arch/arm/mach-pxa/include/mach/pxa27x-udc.h
+++ b/arch/arm/mach-pxa/include/mach/pxa27x-udc.h
@@ -56,9 +56,9 @@
#define UDCFNR __REG(0x40600014) /* UDC Frame Number Register */
#define UDCOTGICR __REG(0x40600018) /* UDC On-The-Go interrupt control */
#define UDCOTGICR_IESF (1 << 24) /* OTG SET_FEATURE command recvd */
-#define UDCOTGICR_IEXR (1 << 17) /* Extra Transciever Interrupt
+#define UDCOTGICR_IEXR (1 << 17) /* Extra Transceiver Interrupt
Rising Edge Interrupt Enable */
-#define UDCOTGICR_IEXF (1 << 16) /* Extra Transciever Interrupt
+#define UDCOTGICR_IEXF (1 << 16) /* Extra Transceiver Interrupt
Falling Edge Interrupt Enable */
#define UDCOTGICR_IEVV40R (1 << 9) /* OTG Vbus Valid 4.0V Rising Edge
Interrupt Enable */