diff options
author | Catalin Marinas <catalin.marinas@arm.com> | 2008-04-18 22:43:08 +0100 |
---|---|---|
committer | Catalin Marinas <catalin.marinas@arm.com> | 2008-04-18 22:43:08 +0100 |
commit | b7b0ba942f7b18de678cd081902aad8a0b6581c6 (patch) | |
tree | 65e36cdf831906876bc558ab6d40db58d9ba5e92 /arch/arm/mach-realview/platsmp.c | |
parent | cb170a45d69b573a08247acfbbff3b9d6e6e2f8f (diff) |
RealView: Move the SCU initialisation out of __v6_setup
This patch moves the SCU initialisation from __v6_setup to the
smp_prepare_cpus() function as it relies on platform-specific
settings. Changes to get_core_count() are mainly for allowing cleaner
code with the upcoming PB11MPCore patches.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm/mach-realview/platsmp.c')
-rw-r--r-- | arch/arm/mach-realview/platsmp.c | 43 |
1 files changed, 35 insertions, 8 deletions
diff --git a/arch/arm/mach-realview/platsmp.c b/arch/arm/mach-realview/platsmp.c index de2b7159557..2ff1acaf2be 100644 --- a/arch/arm/mach-realview/platsmp.c +++ b/arch/arm/mach-realview/platsmp.c @@ -15,11 +15,13 @@ #include <linux/smp.h> #include <asm/cacheflush.h> -#include <asm/hardware/arm_scu.h> #include <asm/hardware.h> #include <asm/io.h> #include <asm/mach-types.h> +#include <asm/arch/board-eb.h> +#include <asm/arch/scu.h> + extern void realview_secondary_startup(void); /* @@ -31,9 +33,13 @@ volatile int __cpuinitdata pen_release = -1; static unsigned int __init get_core_count(void) { unsigned int ncores; + void __iomem *scu_base = 0; + + if (machine_is_realview_eb() && core_tile_eb11mp()) + scu_base = __io_address(REALVIEW_EB11MP_SCU_BASE); - if (machine_is_realview_eb() && core_tile_eb11mp()) { - ncores = __raw_readl(__io_address(REALVIEW_EB11MP_SCU_BASE) + SCU_CONFIG); + if (scu_base) { + ncores = __raw_readl(scu_base + SCU_CONFIG); ncores = (ncores & 0x03) + 1; } else ncores = 1; @@ -41,6 +47,24 @@ static unsigned int __init get_core_count(void) return ncores; } +/* + * Setup the SCU + */ +static void scu_enable(void) +{ + u32 scu_ctrl; + void __iomem *scu_base; + + if (machine_is_realview_eb() && core_tile_eb11mp()) + scu_base = __io_address(REALVIEW_EB11MP_SCU_BASE); + else + BUG(); + + scu_ctrl = __raw_readl(scu_base + SCU_CTRL); + scu_ctrl |= 1; + __raw_writel(scu_ctrl, scu_base + SCU_CTRL); +} + static DEFINE_SPINLOCK(boot_lock); void __cpuinit platform_secondary_init(unsigned int cpu) @@ -210,11 +234,14 @@ void __init smp_prepare_cpus(unsigned int max_cpus) cpu_set(i, cpu_present_map); /* - * Do we need any more CPUs? If so, then let them know where - * to start. Note that, on modern versions of MILO, the "poke" - * doesn't actually do anything until each individual core is - * sent a soft interrupt to get it out of WFI + * Initialise the SCU if there are more than one CPU and let + * them know where to start. Note that, on modern versions of + * MILO, the "poke" doesn't actually do anything until each + * individual core is sent a soft interrupt to get it out of + * WFI */ - if (max_cpus > 1) + if (max_cpus > 1) { + scu_enable(); poke_milo(); + } } |