diff options
| author | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-12-04 16:13:29 +0000 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2010-12-14 19:21:42 +0000 |
| commit | ff2e27ae0b17f53a6a289c87d325f706598f3788 (patch) | |
| tree | 1288f491bce11b3d8a6d48604fd00d68bea6eb98 /arch/arm/mach-realview/realview_pb11mp.c | |
| parent | 384895330e0f3954d9478fd0853145f9c169df12 (diff) | |
ARM: GIC: consolidate gic_cpu_base_addr to common GIC code
Every architecture using the GIC has a gic_cpu_base_addr pointer for
GIC 0 for their entry assembly code to use to decode the cause of the
current interrupt. Move this into the common GIC code.
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-realview/realview_pb11mp.c')
| -rw-r--r-- | arch/arm/mach-realview/realview_pb11mp.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c index 61204265b4e..8e8ab7d29a6 100644 --- a/arch/arm/mach-realview/realview_pb11mp.c +++ b/arch/arm/mach-realview/realview_pb11mp.c @@ -309,9 +309,8 @@ static void __init gic_init_irq(void) writel(0x00000000, __io_address(REALVIEW_SYS_LOCK)); /* ARM11MPCore test chip GIC, primary */ - gic_cpu_base_addr = __io_address(REALVIEW_TC11MP_GIC_CPU_BASE); gic_init(0, 29, __io_address(REALVIEW_TC11MP_GIC_DIST_BASE), - gic_cpu_base_addr); + __io_address(REALVIEW_TC11MP_GIC_CPU_BASE)); /* board GIC, secondary */ gic_init(1, IRQ_PB11MP_GIC_START, |