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authorPer Fransson <per.xx.fransson@stericsson.com>2010-09-08 21:21:40 +0530
committerSantosh Shilimkar <santosh.shilimkar@ti.com>2010-10-26 11:40:06 +0530
commitae6948048c417d429b8a0f85fad13e483f7cc1a3 (patch)
treeee4957115c7f528a85942f42af440720da301e40 /arch/arm/mach-s3c2410/bast-ide.c
parent444457c1f59d58bc48acf5b4fc585225106c11ff (diff)
ARM: ux500 specific L2 cache code
The generic version of l2x0_inv_all is only called just after disabling the L2 cache and is surrounded by a spinlock. However, we're not really turning off the L2 cache right now, and the PL310 does not support exclusive accesses (used to implement the spinlock). So, the invalidation needs to be done without the spinlock. Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Hans-Juergen Koch <hjk@linutronix.de> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Per Fransson <per.xx.fransson@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com>
Diffstat (limited to 'arch/arm/mach-s3c2410/bast-ide.c')
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