diff options
author | Ben Dooks <ben-linux@fluff.org> | 2010-03-07 22:56:19 +0000 |
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committer | Ben Dooks <ben-linux@fluff.org> | 2010-03-07 22:56:19 +0000 |
commit | 3b05007e43ea629394e89ea0b023d7b15375a2bb (patch) | |
tree | f96ba06dc0f8934786d40351eeeadb40675e04ee /arch/arm/mach-s3c2410/include/mach | |
parent | f9fed7cd7efaa0d050f21f6f9ed532d3143b7369 (diff) | |
parent | 41f23a09f32124322dc41bea7f65baff6e9b0ac5 (diff) |
ARM: Merge next-samsung-s3c2443-clock
Merge branch 'next-samsung-s3c2443-clock' into next-samsung
Diffstat (limited to 'arch/arm/mach-s3c2410/include/mach')
-rw-r--r-- | arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h | 32 |
1 files changed, 1 insertions, 31 deletions
diff --git a/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h b/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h index 6026d091a2f..d87ebe0cb62 100644 --- a/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h +++ b/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h @@ -42,23 +42,14 @@ #define S3C2443_PLLCON_OFF (1<<24) -#define S3C2443_CLKSRC_I2S_EXT (1<<14) -#define S3C2443_CLKSRC_I2S_EPLLDIV (0<<14) -#define S3C2443_CLKSRC_I2S_EPLLREF (2<<14) -#define S3C2443_CLKSRC_I2S_EPLLREF3 (3<<14) -#define S3C2443_CLKSRC_I2S_MASK (3<<14) - #define S3C2443_CLKSRC_EPLLREF_XTAL (2<<7) #define S3C2443_CLKSRC_EPLLREF_EXTCLK (3<<7) #define S3C2443_CLKSRC_EPLLREF_MPLLREF (0<<7) #define S3C2443_CLKSRC_EPLLREF_MPLLREF2 (1<<7) #define S3C2443_CLKSRC_EPLLREF_MASK (3<<7) -#define S3C2443_CLKSRC_ESYSCLK_EPLL (1<<6) -#define S3C2443_CLKSRC_MSYSCLK_MPLL (1<<4) #define S3C2443_CLKSRC_EXTCLK_DIV (1<<3) -#define S3C2443_CLKDIV0_DVS (1<<13) #define S3C2443_CLKDIV0_HALF_HCLK (1<<3) #define S3C2443_CLKDIV0_HALF_PCLK (1<<2) @@ -81,28 +72,7 @@ #define S3C2443_CLKDIV0_ARMDIV_12 (13<<9) #define S3C2443_CLKDIV0_ARMDIV_16 (15<<9) -/* S3C2443_CLKDIV1 */ - -#define S3C2443_CLKDIV1_CAMDIV_MASK (15<<26) -#define S3C2443_CLKDIV1_CAMDIV_SHIFT (26) - -#define S3C2443_CLKDIV1_HSSPIDIV_MASK (3<<24) -#define S3C2443_CLKDIV1_HSSPIDIV_SHIFT (24) - -#define S3C2443_CLKDIV1_DISPDIV_MASK (0xff<<16) -#define S3C2443_CLKDIV1_DISPDIV_SHIFT (16) - -#define S3C2443_CLKDIV1_I2SDIV_MASK (15<<12) -#define S3C2443_CLKDIV1_I2SDIV_SHIFT (12) - -#define S3C2443_CLKDIV1_UARTDIV_MASK (15<<8) -#define S3C2443_CLKDIV1_UARTDIV_SHIFT (8) - -#define S3C2443_CLKDIV1_HSMMCDIV_MASK (3<<6) -#define S3C2443_CLKDIV1_HSMMCDIV_SHIFT (6) - -#define S3C2443_CLKDIV1_USBHOSTDIV_MASK (3<<4) -#define S3C2443_CLKDIV1_USBHOSTDIV_SHIFT (4) +/* S3C2443_CLKDIV1 removed, only used in clock.c code */ #define S3C2443_CLKCON_NAND |