diff options
| author | Ben Dooks <ben-linux@fluff.org> | 2007-12-23 03:09:33 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-01-28 13:20:50 +0000 |
| commit | 0baada2742a42390a2ebed09e07e1fab518db884 (patch) | |
| tree | f66d3dc70e4f6975df3d581d972cc1bb342dc028 /arch/arm/mach-s3c2412/irq.c | |
| parent | 8e3007a0e8a0d2f5e3139cb9fe606c2a998b9ed3 (diff) | |
[ARM] 4730/1: S3C2412: Ensure the PWRCFG has the right mode for RTC wake
Ensure that if the RTC IRQ is not selected for wake in the
base configuration, then the PWRCFG has the same value set
in it.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-s3c2412/irq.c')
| -rw-r--r-- | arch/arm/mach-s3c2412/irq.c | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c2412/irq.c b/arch/arm/mach-s3c2412/irq.c index e9d0c769f5d..cc1917bf952 100644 --- a/arch/arm/mach-s3c2412/irq.c +++ b/arch/arm/mach-s3c2412/irq.c @@ -33,6 +33,7 @@ #include <asm/arch/regs-irq.h> #include <asm/arch/regs-gpio.h> +#include <asm/arch/regs-power.h> #include <asm/plat-s3c24xx/cpu.h> #include <asm/plat-s3c24xx/irq.h> @@ -153,6 +154,22 @@ static struct irq_chip s3c2412_irq_cfsdi = { .unmask = s3c2412_irq_cfsdi_unmask, }; +static int s3c2412_irq_rtc_wake(unsigned int irqno, unsigned int state) +{ + unsigned long pwrcfg; + + pwrcfg = __raw_readl(S3C2412_PWRCFG); + if (state) + pwrcfg &= ~S3C2412_PWRCFG_RTC_MASKIRQ; + else + pwrcfg |= S3C2412_PWRCFG_RTC_MASKIRQ; + __raw_writel(pwrcfg, S3C2412_PWRCFG); + + return s3c_irq_chip.set_wake(irqno, state); +} + +static struct irq_chip s3c2412_irq_rtc_chip; + static int s3c2412_irq_add(struct sys_device *sysdev) { unsigned int irqno; @@ -173,6 +190,13 @@ static int s3c2412_irq_add(struct sys_device *sysdev) set_irq_flags(irqno, IRQF_VALID); } + /* change RTC IRQ's set wake method */ + + s3c2412_irq_rtc_chip = s3c_irq_chip; + s3c2412_irq_rtc_chip.set_wake = s3c2412_irq_rtc_wake; + + set_irq_chip(IRQ_RTC, &s3c2412_irq_rtc_chip); + return 0; } |