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authorKukjin Kim <kgene.kim@samsung.com>2011-01-06 18:44:09 +0900
committerKukjin Kim <kgene.kim@samsung.com>2011-01-06 18:44:09 +0900
commit854bf596b3be4f4b41c5b3bd8039e4828ec1ace6 (patch)
tree27b967178723f0230043dc0b0d1436d2eb81a29d /arch/arm/mach-s3c2416/clock.c
parentab10f1dd914ad87e0370bd8b82f77dcd32b6d941 (diff)
parent13d27f05d7b2c41d59c6e4bd6fc4ea10d3302ec3 (diff)
Merge branch 'next-s3c24xx' into for-next
Diffstat (limited to 'arch/arm/mach-s3c2416/clock.c')
-rw-r--r--arch/arm/mach-s3c2416/clock.c18
1 files changed, 13 insertions, 5 deletions
diff --git a/arch/arm/mach-s3c2416/clock.c b/arch/arm/mach-s3c2416/clock.c
index 7ccf5a2a2bf..3b02d8506e2 100644
--- a/arch/arm/mach-s3c2416/clock.c
+++ b/arch/arm/mach-s3c2416/clock.c
@@ -38,12 +38,11 @@ static unsigned int armdiv[8] = {
[7] = 8,
};
-/* ID to hardware numbering, 0 is HSMMC1, 1 is HSMMC0 */
static struct clksrc_clk hsmmc_div[] = {
[0] = {
.clk = {
.name = "hsmmc-div",
- .id = 1,
+ .id = 0,
.parent = &clk_esysclk.clk,
},
.reg_div = { .reg = S3C2416_CLKDIV2, .size = 2, .shift = 6 },
@@ -51,7 +50,7 @@ static struct clksrc_clk hsmmc_div[] = {
[1] = {
.clk = {
.name = "hsmmc-div",
- .id = 0,
+ .id = 1,
.parent = &clk_esysclk.clk,
},
.reg_div = { .reg = S3C2443_CLKDIV1, .size = 2, .shift = 6 },
@@ -61,7 +60,7 @@ static struct clksrc_clk hsmmc_div[] = {
static struct clksrc_clk hsmmc_mux[] = {
[0] = {
.clk = {
- .id = 1,
+ .id = 0,
.name = "hsmmc-if",
.ctrlbit = (1 << 6),
.enable = s3c2443_clkcon_enable_s,
@@ -77,7 +76,7 @@ static struct clksrc_clk hsmmc_mux[] = {
},
[1] = {
.clk = {
- .id = 0,
+ .id = 1,
.name = "hsmmc-if",
.ctrlbit = (1 << 12),
.enable = s3c2443_clkcon_enable_s,
@@ -93,6 +92,13 @@ static struct clksrc_clk hsmmc_mux[] = {
},
};
+static struct clk hsmmc0_clk = {
+ .name = "hsmmc",
+ .id = 0,
+ .parent = &clk_h,
+ .enable = s3c2443_clkcon_enable_h,
+ .ctrlbit = S3C2416_HCLKCON_HSMMC0,
+};
static inline unsigned int s3c2416_fclk_div(unsigned long clkcon0)
{
@@ -130,6 +136,8 @@ void __init s3c2416_init_clocks(int xtal)
for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
s3c_register_clksrc(clksrcs[ptr], 1);
+ s3c24xx_register_clock(&hsmmc0_clk);
+
s3c_pwmclk_init();
}