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author | Murali Karicheri <m-karicheri2@ti.com> | 2011-11-15 01:42:07 +0530 |
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committer | Sekhar Nori <nsekhar@ti.com> | 2011-12-05 16:47:15 +0530 |
commit | 78b838252fa986f66c7ec8047726ea500a08d98f (patch) | |
tree | f1ac66b81c7de47c2299735ea6ddf4b0169b07e9 /arch/arm/mach-s3c2440 | |
parent | 8f9a0981aca6bd454ef2a4bdac510af0f6e55bd4 (diff) |
ARM: davinci: psc: fix incorrect offsets
Seperate PDSTAT and PDCTL registers are defined for
domain 0 and domain 1 where as the code always reads
the domain 0 PDSTAT register and domain 1 PDCTL register.
Fix this issue. While at it, introduce usage of macros
for register masks to improve readability.
Reviewed-by: Sergei Shtylyov <sshtylyov@mvista.com>
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Diffstat (limited to 'arch/arm/mach-s3c2440')
0 files changed, 0 insertions, 0 deletions