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authorAndi Kleen <ak@linux.intel.com>2014-11-03 17:00:27 -0800
committerIngo Molnar <mingo@kernel.org>2014-11-16 09:45:47 +0100
commit41a134a5830a5e1396723ace0a63000780d6e267 (patch)
treecf0a667727f57db649606fc92907d9c363734b7f /arch/arm/mach-s3c24xx/mach-smdk2443.c
parent226424eee809251ec23bd4b09d8efba09c10fc3c (diff)
perf/x86/intel/uncore: Fix IRP uncore register offsets on Haswell EP
The counter register offsets for the IRP box PMU for Haswell-EP were incorrect. The offsets actually changed over IvyBridge EP. Fix them to the correct values. For this we need to fork the read function from the IVB and use an own counter array. Tested-by: patrick.lu@intel.com Signed-off-by: Andi Kleen <ak@linux.intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Arnaldo Carvalho de Melo <acme@kernel.org> Link: http://lkml.kernel.org/r/1415062828-19759-3-git-send-email-andi@firstfloor.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/arm/mach-s3c24xx/mach-smdk2443.c')
0 files changed, 0 insertions, 0 deletions