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authorHeiko Stuebner <heiko@sntech.de>2012-05-20 01:01:35 +0900
committerKukjin Kim <kgene.kim@samsung.com>2012-05-20 03:05:04 +0900
commit0e944e276c7ebcb880d20f6e9255f596c85fc767 (patch)
tree90aff0c2e5fe44fda194d4a26ed678dc38c48e5c /arch/arm/mach-s3c24xx/s3c2416.c
parent2de05a57467c43f58802cdeaa547aee73396b6f3 (diff)
ARM: S3C24XX: add support for second irq set of S3C2416
The S3C2416 has a separate second interrupt register-set to support additional irqs. This patch adds the necessary constants and registers the irq handlers for it. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s3c24xx/s3c2416.c')
-rw-r--r--arch/arm/mach-s3c24xx/s3c2416.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c24xx/s3c2416.c b/arch/arm/mach-s3c24xx/s3c2416.c
index 7743fade50d..ed5a95ece9e 100644
--- a/arch/arm/mach-s3c24xx/s3c2416.c
+++ b/arch/arm/mach-s3c24xx/s3c2416.c
@@ -106,6 +106,7 @@ int __init s3c2416_init(void)
register_syscore_ops(&s3c2416_pm_syscore_ops);
#endif
register_syscore_ops(&s3c24xx_irq_syscore_ops);
+ register_syscore_ops(&s3c2416_irq_syscore_ops);
return device_register(&s3c2416_dev);
}