diff options
| author | Ben Dooks <ben-linux@fluff.org> | 2009-03-25 11:01:24 +0000 |
|---|---|---|
| committer | Ben Dooks <ben-linux@fluff.org> | 2009-05-07 11:04:58 +0100 |
| commit | 4faf6867638cc21aa43b4ca4ed0bdf14a2d29762 (patch) | |
| tree | 1fed91079785469a6f044900bd322166df37adbf /arch/arm/mach-s3c6400/setup-sdhci.c | |
| parent | e074f9803227236252c8e7be16d836d709abff57 (diff) | |
[ARM] S3C64XX: Add S3C6400 SDHCI setup support
Add support for S3C6400 SDHCI channels 0 and 1, making
the GPIO code common to both S3C6400 and S3C6410.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/mach-s3c6400/setup-sdhci.c')
| -rw-r--r-- | arch/arm/mach-s3c6400/setup-sdhci.c | 63 |
1 files changed, 63 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c6400/setup-sdhci.c b/arch/arm/mach-s3c6400/setup-sdhci.c new file mode 100644 index 00000000000..b93dafbee1f --- /dev/null +++ b/arch/arm/mach-s3c6400/setup-sdhci.c @@ -0,0 +1,63 @@ +/* linux/arch/arm/mach-s3c6410/setup-sdhci.c + * + * Copyright 2008 Simtec Electronics + * Copyright 2008 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * http://armlinux.simtec.co.uk/ + * + * S3C6410 - Helper functions for settign up SDHCI device(s) (HSMMC) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include <linux/kernel.h> +#include <linux/types.h> +#include <linux/interrupt.h> +#include <linux/platform_device.h> +#include <linux/io.h> + +#include <linux/mmc/card.h> +#include <linux/mmc/host.h> + +#include <plat/regs-sdhci.h> +#include <plat/sdhci.h> + +/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */ + +char *s3c6400_hsmmc_clksrcs[4] = { + [0] = "hsmmc", + [1] = "hsmmc", + [2] = "mmc_bus", + /* [3] = "48m", - note not succesfully used yet */ +}; + +void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev, + void __iomem *r, + struct mmc_ios *ios, + struct mmc_card *card) +{ + u32 ctrl2, ctrl3; + + ctrl2 = readl(r + S3C_SDHCI_CONTROL2); + ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK; + ctrl2 |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR | + S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK | + S3C_SDHCI_CTRL2_ENFBCLKRX | + S3C_SDHCI_CTRL2_DFCNT_NONE | + S3C_SDHCI_CTRL2_ENCLKOUTHOLD); + + if (ios->clock < 25 * 1000000) + ctrl3 = (S3C_SDHCI_CTRL3_FCSEL3 | + S3C_SDHCI_CTRL3_FCSEL2 | + S3C_SDHCI_CTRL3_FCSEL1 | + S3C_SDHCI_CTRL3_FCSEL0); + else + ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0); + + printk(KERN_INFO "%s: CTRL 2=%08x, 3=%08x\n", __func__, ctrl2, ctrl3); + writel(ctrl2, r + S3C_SDHCI_CONTROL2); + writel(ctrl3, r + S3C_SDHCI_CONTROL3); +} + |