diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-03-12 16:00:54 -0800 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-03-12 16:00:54 -0800 |
| commit | dca1d9f6d7ae428c193f32bd3e9a4ca13176648b (patch) | |
| tree | 02de8c3503c1c811754423d2fa3f3b4978044f6e /arch/arm/mach-s3c64xx/include/mach/gpio-bank-e.h | |
| parent | 9ff99339447de403a46be5e3f23d0c794d540b06 (diff) | |
| parent | 91e013827c0bcbb187ecf02213c5446b6f62d445 (diff) | |
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (370 commits)
ARM: S3C2443: Add set_rate and round_rate calls for armdiv clock
ARM: S3C2443: Remove #if 0 for clk_mpll
ARM: S3C2443: Update notes on MPLLREF clock
ARM: S3C2443: Further clksrc-clk conversions
ARM: S3C2443: Change to using plat-samsung clksrc-clk implementation
USB: Fix s3c-hsotg build following Samsung platform header moves
ARM: S3C64XX: Reintroduce unconditional build of audio device
ARM: 5961/1: ux500: fix CLKRST addresses
ARM: 5977/1: arm: Enable backtrace printing on oops when PC is corrupted
ASoC: Fix S3C64xx IIS driver for Samsung header reorg
ARM: S3C2440: Fix plat-s3c24xx move of s3c2440/s3c2442 support
[ARM] pxa: fix typo in mxm8x10.h
[ARM] pxa/raumfeld: set GPIO drive bits for LED pins
[ARM] pxa/zeus: Add support for mcp2515 CAN bus
[ARM] pxa/zeus: Add support for onboard max6369 watchdog
[ARM] pxa/zeus: Add Eurotech as the manufacturer
[ARM] pxa/zeus: Correct the USB host initialisation flags
[ARM] pxa/zeus: Allow usage of 8250-compatible UART in uncompress
[ARM] pxa: refactor uncompress.h for non-PXA uarts
[ARM] mmp2: fix incorrect calling of chip->mask_ack() for 2nd level cascaded IRQs
...
Diffstat (limited to 'arch/arm/mach-s3c64xx/include/mach/gpio-bank-e.h')
| -rw-r--r-- | arch/arm/mach-s3c64xx/include/mach/gpio-bank-e.h | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio-bank-e.h b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-e.h new file mode 100644 index 00000000000..f057adb627d --- /dev/null +++ b/arch/arm/mach-s3c64xx/include/mach/gpio-bank-e.h @@ -0,0 +1,44 @@ +/* linux/arch/arm/mach-s3c64xx/include/mach/gpio-bank-e.h + * + * Copyright 2008 Openmoko, Inc. + * Copyright 2008 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * http://armlinux.simtec.co.uk/ + * + * GPIO Bank E register and configuration definitions + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#define S3C64XX_GPECON (S3C64XX_GPE_BASE + 0x00) +#define S3C64XX_GPEDAT (S3C64XX_GPE_BASE + 0x04) +#define S3C64XX_GPEPUD (S3C64XX_GPE_BASE + 0x08) +#define S3C64XX_GPECONSLP (S3C64XX_GPE_BASE + 0x0c) +#define S3C64XX_GPEPUDSLP (S3C64XX_GPE_BASE + 0x10) + +#define S3C64XX_GPE_CONMASK(__gpio) (0xf << ((__gpio) * 4)) +#define S3C64XX_GPE_INPUT(__gpio) (0x0 << ((__gpio) * 4)) +#define S3C64XX_GPE_OUTPUT(__gpio) (0x1 << ((__gpio) * 4)) + +#define S3C64XX_GPE0_PCM1_SCLK (0x02 << 0) +#define S3C64XX_GPE0_I2S1_CLK (0x03 << 0) +#define S3C64XX_GPE0_AC97_BITCLK (0x04 << 0) + +#define S3C64XX_GPE1_PCM1_EXTCLK (0x02 << 4) +#define S3C64XX_GPE1_I2S1_CDCLK (0x03 << 4) +#define S3C64XX_GPE1_AC97_nRESET (0x04 << 4) + +#define S3C64XX_GPE2_PCM1_FSYNC (0x02 << 8) +#define S3C64XX_GPE2_I2S1_LRCLK (0x03 << 8) +#define S3C64XX_GPE2_AC97_SYNC (0x04 << 8) + +#define S3C64XX_GPE3_PCM1_SIN (0x02 << 12) +#define S3C64XX_GPE3_I2S1_DI (0x03 << 12) +#define S3C64XX_GPE3_AC97_SDI (0x04 << 12) + +#define S3C64XX_GPE4_PCM1_SOUT (0x02 << 16) +#define S3C64XX_GPE4_I2S1_D0 (0x03 << 16) +#define S3C64XX_GPE4_AC97_SDO (0x04 << 16) + |