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authorChris Metcalf <cmetcalf@tilera.com>2010-08-13 19:59:15 -0400
committerChris Metcalf <cmetcalf@tilera.com>2010-08-13 19:59:15 -0400
commit7d72e6fa56c4100b9669efe0044f77ed9eb785a1 (patch)
tree5e90bf4969809a1ab20b97432b85be20ccfaa1f4 /arch/arm/mach-s3c64xx/include/mach
parentba00376b0b13f234d839541a7b36a5bf5c2a4036 (diff)
parent2be1f3a73dd02e38e181cf5abacb3d45a6a2d6b8 (diff)
Merge branch 'master' into for-linus
Diffstat (limited to 'arch/arm/mach-s3c64xx/include/mach')
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/map.h6
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/regs-clock.h5
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/regs-fb.h20
3 files changed, 11 insertions, 20 deletions
diff --git a/arch/arm/mach-s3c64xx/include/mach/map.h b/arch/arm/mach-s3c64xx/include/mach/map.h
index e1eab3c94ae..a1f13f02c84 100644
--- a/arch/arm/mach-s3c64xx/include/mach/map.h
+++ b/arch/arm/mach-s3c64xx/include/mach/map.h
@@ -67,6 +67,7 @@
#define S3C64XX_PA_USB_HSOTG (0x7C000000)
#define S3C64XX_PA_WATCHDOG (0x7E004000)
#define S3C64XX_PA_RTC (0x7E005000)
+#define S3C64XX_PA_KEYPAD (0x7E00A000)
#define S3C64XX_PA_ADC (0x7E00B000)
#define S3C64XX_PA_SYSCON (0x7E00F000)
#define S3C64XX_PA_AC97 (0x7F001000)
@@ -86,6 +87,9 @@
#define S3C64XX_SZ_GPIO SZ_4K
#define S3C64XX_PA_SDRAM (0x50000000)
+
+#define S3C64XX_PA_CFCON (0x70300000)
+
#define S3C64XX_PA_VIC0 (0x71200000)
#define S3C64XX_PA_VIC1 (0x71300000)
@@ -120,5 +124,7 @@
#define S3C_PA_WDT S3C64XX_PA_WATCHDOG
#define SAMSUNG_PA_ADC S3C64XX_PA_ADC
+#define SAMSUNG_PA_CFCON S3C64XX_PA_CFCON
+#define SAMSUNG_PA_KEYPAD S3C64XX_PA_KEYPAD
#endif /* __ASM_ARCH_6400_MAP_H */
diff --git a/arch/arm/mach-s3c64xx/include/mach/regs-clock.h b/arch/arm/mach-s3c64xx/include/mach/regs-clock.h
index 0114eb0c1fe..05332b998ec 100644
--- a/arch/arm/mach-s3c64xx/include/mach/regs-clock.h
+++ b/arch/arm/mach-s3c64xx/include/mach/regs-clock.h
@@ -34,6 +34,7 @@
#define S3C_SCLK_GATE S3C_CLKREG(0x38)
#define S3C_MEM0_GATE S3C_CLKREG(0x3C)
#define S3C6410_CLK_SRC2 S3C_CLKREG(0x10C)
+#define S3C_MEM_SYS_CFG S3C_CLKREG(0x120)
/* CLKDIV0 */
#define S3C6400_CLKDIV0_PCLK_MASK (0xf << 12)
@@ -154,4 +155,8 @@
#define S3C6400_CLKSRC_EPLL_MOUT_SHIFT (2)
#define S3C6400_CLKSRC_MFC (1 << 4)
+/* MEM_SYS_CFG */
+#define MEM_SYS_CFG_INDEP_CF 0x4000
+#define MEM_SYS_CFG_EBI_FIX_PRI_CFCON 0x30
+
#endif /* _PLAT_REGS_CLOCK_H */
diff --git a/arch/arm/mach-s3c64xx/include/mach/regs-fb.h b/arch/arm/mach-s3c64xx/include/mach/regs-fb.h
index f56611526c6..a06ee0af9a4 100644
--- a/arch/arm/mach-s3c64xx/include/mach/regs-fb.h
+++ b/arch/arm/mach-s3c64xx/include/mach/regs-fb.h
@@ -18,24 +18,4 @@
#include <plat/regs-fb-v4.h>
-/* Palette registers */
-#define WIN2_PAL(_entry) (0x300 + ((_entry) * 2))
-#define WIN3_PAL(_entry) (0x320 + ((_entry) * 2))
-#define WIN4_PAL(_entry) (0x340 + ((_entry) * 2))
-#define WIN0_PAL(_entry) (0x400 + ((_entry) * 4))
-#define WIN1_PAL(_entry) (0x800 + ((_entry) * 4))
-
-static inline unsigned int s3c_fb_pal_reg(unsigned int window, int reg)
-{
- switch (window) {
- case 0: return WIN0_PAL(reg);
- case 1: return WIN1_PAL(reg);
- case 2: return WIN2_PAL(reg);
- case 3: return WIN3_PAL(reg);
- case 4: return WIN4_PAL(reg);
- }
-
- BUG();
-}
-
#endif /* __ASM_ARCH_MACH_REGS_FB_H */