diff options
author | David S. Miller <davem@davemloft.net> | 2010-08-16 14:09:34 -0700 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2010-08-16 14:09:34 -0700 |
commit | 300a103d1504134f8c4a7e831f995e917ea9b1e4 (patch) | |
tree | 7f94d5fff513d132bd0b57a9e3bd96c4cc80d707 /arch/arm/mach-s5pc100/include | |
parent | 0a492896ac07336c98f37ad7fab4a6387b6ada78 (diff) | |
parent | da5cabf80e2433131bf0ed8993abc0f7ea618c73 (diff) |
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
Diffstat (limited to 'arch/arm/mach-s5pc100/include')
-rw-r--r-- | arch/arm/mach-s5pc100/include/mach/irqs.h | 4 | ||||
-rw-r--r-- | arch/arm/mach-s5pc100/include/mach/map.h | 21 | ||||
-rw-r--r-- | arch/arm/mach-s5pc100/include/mach/regs-clock.h | 3 | ||||
-rw-r--r-- | arch/arm/mach-s5pc100/include/mach/regs-fb.h | 34 | ||||
-rw-r--r-- | arch/arm/mach-s5pc100/include/mach/system.h | 9 |
5 files changed, 27 insertions, 44 deletions
diff --git a/arch/arm/mach-s5pc100/include/mach/irqs.h b/arch/arm/mach-s5pc100/include/mach/irqs.h index 28aa551dc3a..06513e64724 100644 --- a/arch/arm/mach-s5pc100/include/mach/irqs.h +++ b/arch/arm/mach-s5pc100/include/mach/irqs.h @@ -29,7 +29,7 @@ #define IRQ_GPIOINT S5P_IRQ_VIC0(30) /* VIC1: ARM, power, memory, connectivity */ -#define IRQ_CORTEX0 S5P_IRQ_VIC1(0) +#define IRQ_PMU S5P_IRQ_VIC1(0) #define IRQ_CORTEX1 S5P_IRQ_VIC1(1) #define IRQ_CORTEX2 S5P_IRQ_VIC1(2) #define IRQ_CORTEX3 S5P_IRQ_VIC1(3) @@ -38,7 +38,7 @@ #define IRQ_IEMIEC S5P_IRQ_VIC1(6) #define IRQ_ONENAND S5P_IRQ_VIC1(7) #define IRQ_NFC S5P_IRQ_VIC1(8) -#define IRQ_CFC S5P_IRQ_VIC1(9) +#define IRQ_CFCON S5P_IRQ_VIC1(9) #define IRQ_UART0 S5P_IRQ_VIC1(10) #define IRQ_UART1 S5P_IRQ_VIC1(11) #define IRQ_UART2 S5P_IRQ_VIC1(12) diff --git a/arch/arm/mach-s5pc100/include/mach/map.h b/arch/arm/mach-s5pc100/include/mach/map.h index cadae430568..01b9134feff 100644 --- a/arch/arm/mach-s5pc100/include/mach/map.h +++ b/arch/arm/mach-s5pc100/include/mach/map.h @@ -61,6 +61,8 @@ #define S5PC100_PA_ONENAND (0xE7100000) +#define S5PC100_PA_CFCON (0xE7800000) + /* DMA */ #define S5PC100_PA_MDMA (0xE8100000) #define S5PC100_PA_PDMA0 (0xE9000000) @@ -72,6 +74,9 @@ #define S5PC100_PA_SYSTIMER (0xEA100000) +#define S5PC100_PA_WATCHDOG (0xEA200000) +#define S5PC100_PA_RTC (0xEA300000) + #define S5PC100_PA_UART (0xEC000000) #define S5P_PA_UART0 (S5PC100_PA_UART + 0x0) @@ -94,6 +99,10 @@ #define S5PC100_PA_FB (0xEE000000) +#define S5PC100_PA_FIMC0 (0xEE200000) +#define S5PC100_PA_FIMC1 (0xEE300000) +#define S5PC100_PA_FIMC2 (0xEE400000) + #define S5PC100_PA_I2S0 (0xF2000000) #define S5PC100_PA_I2S1 (0xF2100000) #define S5PC100_PA_I2S2 (0xF2200000) @@ -104,6 +113,8 @@ #define S5PC100_PA_PCM0 0xF2400000 #define S5PC100_PA_PCM1 0xF2500000 +#define S5PC100_PA_TSADC (0xF3000000) + /* KEYPAD */ #define S5PC100_PA_KEYPAD (0xF3100000) @@ -130,9 +141,19 @@ #define S3C_PA_HSMMC1 S5PC100_PA_HSMMC(1) #define S3C_PA_HSMMC2 S5PC100_PA_HSMMC(2) #define S3C_PA_KEYPAD S5PC100_PA_KEYPAD +#define S3C_PA_WDT S5PC100_PA_WATCHDOG #define S3C_PA_TSADC S5PC100_PA_TSADC #define S3C_PA_ONENAND S5PC100_PA_ONENAND #define S3C_PA_ONENAND_BUF S5PC100_PA_ONENAND_BUF #define S3C_SZ_ONENAND_BUF S5PC100_SZ_ONENAND_BUF +#define S3C_PA_RTC S5PC100_PA_RTC + +#define SAMSUNG_PA_ADC S5PC100_PA_TSADC +#define SAMSUNG_PA_CFCON S5PC100_PA_CFCON +#define SAMSUNG_PA_KEYPAD S5PC100_PA_KEYPAD + +#define S5P_PA_FIMC0 S5PC100_PA_FIMC0 +#define S5P_PA_FIMC1 S5PC100_PA_FIMC1 +#define S5P_PA_FIMC2 S5PC100_PA_FIMC2 #endif /* __ASM_ARCH_C100_MAP_H */ diff --git a/arch/arm/mach-s5pc100/include/mach/regs-clock.h b/arch/arm/mach-s5pc100/include/mach/regs-clock.h index 5d27d286d50..bc92da2e0ba 100644 --- a/arch/arm/mach-s5pc100/include/mach/regs-clock.h +++ b/arch/arm/mach-s5pc100/include/mach/regs-clock.h @@ -71,7 +71,10 @@ #define S5P_CLKDIV1_PCLKD1_SHIFT (16) #define S5PC100_SWRESET S5PC100_REG_OTHERS(0x000) +#define S5PC100_MEM_SYS_CFG S5PC100_REG_OTHERS(0x200) #define S5PC100_SWRESET_RESETVAL 0xc100 +#define MEM_SYS_CFG_EBI_FIX_PRI_CFCON 0x30 + #endif /* __ASM_ARCH_REGS_CLOCK_H */ diff --git a/arch/arm/mach-s5pc100/include/mach/regs-fb.h b/arch/arm/mach-s5pc100/include/mach/regs-fb.h index 1732cd28c76..4be4cc9abf7 100644 --- a/arch/arm/mach-s5pc100/include/mach/regs-fb.h +++ b/arch/arm/mach-s5pc100/include/mach/regs-fb.h @@ -100,40 +100,6 @@ #define BLENDCON (0x260) #define BLENDCON_8BIT_ALPHA (1 << 0) -/* Per-window palette base addresses (start of palette memory). - * Each window palette area consists of 256 32-bit entries. - * START is the first address (entry 0th), END is the address of 255th entry. - */ -#define WIN0_PAL_BASE (0x2400) -#define WIN0_PAL_END (0x27fc) -#define WIN1_PAL_BASE (0x2800) -#define WIN1_PAL_END (0x2bfc) -#define WIN2_PAL_BASE (0x2c00) -#define WIN2_PAL_END (0x2ffc) -#define WIN3_PAL_BASE (0x3000) -#define WIN3_PAL_END (0x33fc) -#define WIN4_PAL_BASE (0x3400) -#define WIN4_PAL_END (0x37fc) - -#define WIN0_PAL(_entry) (WIN0_PAL_BASE + ((_entry) * 4)) -#define WIN1_PAL(_entry) (WIN1_PAL_BASE + ((_entry) * 4)) -#define WIN2_PAL(_entry) (WIN2_PAL_BASE + ((_entry) * 4)) -#define WIN3_PAL(_entry) (WIN3_PAL_BASE + ((_entry) * 4)) -#define WIN4_PAL(_entry) (WIN4_PAL_BASE + ((_entry) * 4)) - -static inline unsigned int s3c_fb_pal_reg(unsigned int window, int reg) -{ - switch (window) { - case 0: return WIN0_PAL(reg); - case 1: return WIN1_PAL(reg); - case 2: return WIN2_PAL(reg); - case 3: return WIN3_PAL(reg); - case 4: return WIN4_PAL(reg); - } - - BUG(); -} - #endif /* __ASM_ARCH_REGS_FB_H */ diff --git a/arch/arm/mach-s5pc100/include/mach/system.h b/arch/arm/mach-s5pc100/include/mach/system.h index 681f626a9ae..a9ea57c0660 100644 --- a/arch/arm/mach-s5pc100/include/mach/system.h +++ b/arch/arm/mach-s5pc100/include/mach/system.h @@ -11,18 +11,11 @@ #ifndef __ASM_ARCH_SYSTEM_H #define __ASM_ARCH_SYSTEM_H __FILE__ -#include <linux/io.h> -#include <mach/map.h> -#include <mach/regs-clock.h> +#include <plat/system-reset.h> static void arch_idle(void) { /* nothing here yet */ } -static void arch_reset(char mode, const char *cmd) -{ - __raw_writel(S5PC100_SWRESET_RESETVAL, S5PC100_SWRESET); - return; -} #endif /* __ASM_ARCH_IRQ_H */ |