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authorMarek Szyprowski <m.szyprowski@samsung.com>2010-08-05 18:22:27 +0900
committerKukjin Kim <kgene.kim@samsung.com>2010-08-05 18:30:51 +0900
commitaaeedff6b1f3cc8e2de0d2899c9ab2699a1ce817 (patch)
tree4858e4b5debe60a1bdaf2fa4666a3d526d58e546 /arch/arm/mach-s5pc100
parentfa9ce74255d9ed5bff4c69e005dcd3a529ad9f66 (diff)
ARM: S5PC100: cleanup hsmmc clock definitions
This patch performs minor clocks cleanup for S5PC100 SoC. HSMMC special clocks has been renamed back to sclk_mmc to match the common style of clock names. This clock has been also added to sdhci clock source list. The duplicate HCLK clock entry for sdhci-s3c has been disabled. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s5pc100')
-rw-r--r--arch/arm/mach-s5pc100/clock.c6
-rw-r--r--arch/arm/mach-s5pc100/setup-sdhci.c8
2 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm/mach-s5pc100/clock.c b/arch/arm/mach-s5pc100/clock.c
index e1136f4ad3c..084abd13b0a 100644
--- a/arch/arm/mach-s5pc100/clock.c
+++ b/arch/arm/mach-s5pc100/clock.c
@@ -1078,7 +1078,7 @@ static struct clksrc_clk clksrcs[] = {
.reg_div = { .reg = S5P_CLK_DIV3, .shift = 24, .size = 4 },
}, {
.clk = {
- .name = "mmc_bus",
+ .name = "sclk_mmc",
.id = 0,
.ctrlbit = (1 << 12),
.enable = s5pc100_sclk1_ctrl,
@@ -1089,7 +1089,7 @@ static struct clksrc_clk clksrcs[] = {
.reg_div = { .reg = S5P_CLK_DIV3, .shift = 0, .size = 4 },
}, {
.clk = {
- .name = "mmc_bus",
+ .name = "sclk_mmc",
.id = 1,
.ctrlbit = (1 << 13),
.enable = s5pc100_sclk1_ctrl,
@@ -1100,7 +1100,7 @@ static struct clksrc_clk clksrcs[] = {
.reg_div = { .reg = S5P_CLK_DIV3, .shift = 4, .size = 4 },
}, {
.clk = {
- .name = "mmc_bus",
+ .name = "sclk_mmc",
.id = 2,
.ctrlbit = (1 << 14),
.enable = s5pc100_sclk1_ctrl,
diff --git a/arch/arm/mach-s5pc100/setup-sdhci.c b/arch/arm/mach-s5pc100/setup-sdhci.c
index ea7ff19adb9..f16946e456e 100644
--- a/arch/arm/mach-s5pc100/setup-sdhci.c
+++ b/arch/arm/mach-s5pc100/setup-sdhci.c
@@ -26,10 +26,10 @@
/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
char *s5pc100_hsmmc_clksrcs[4] = {
- [0] = "hsmmc",
- [1] = "hsmmc",
- /* [2] = "mmc_bus", not yet successfully used yet */
- /* [3] = "48m", - note not successfully used yet */
+ [0] = "hsmmc", /* HCLK */
+ /* [1] = "hsmmc", - duplicate HCLK entry */
+ [2] = "sclk_mmc", /* mmc_bus */
+ /* [3] = "48m", - note not successfully used yet */
};