diff options
author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2008-08-10 18:08:10 +0100 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-09-01 12:06:23 +0100 |
commit | 0ba8b9b273c45dd23f60ff700e265a0069b33758 (patch) | |
tree | cb6aef90464889a27215cf9b7204c11b12e7c628 /arch/arm/mach-sa1100/include | |
parent | b8e6c91c74e9f0279b7c51048779b3d62da60b88 (diff) |
[ARM] cputype: separate definitions, use them
Add asm/cputype.h, moving functions and definitions from asm/system.h
there. Convert all users of 'processor_id' to the more efficient
read_cpuid_id() function.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-sa1100/include')
-rw-r--r-- | arch/arm/mach-sa1100/include/mach/SA-1100.h | 16 | ||||
-rw-r--r-- | arch/arm/mach-sa1100/include/mach/hardware.h | 18 |
2 files changed, 18 insertions, 16 deletions
diff --git a/arch/arm/mach-sa1100/include/mach/SA-1100.h b/arch/arm/mach-sa1100/include/mach/SA-1100.h index 62aaf04a390..4f7ea012e1e 100644 --- a/arch/arm/mach-sa1100/include/mach/SA-1100.h +++ b/arch/arm/mach-sa1100/include/mach/SA-1100.h @@ -2054,19 +2054,3 @@ /* active display mode) */ #define LCCR3_OutEnH (LCCR3_OEP*0) /* Output Enable active High */ #define LCCR3_OutEnL (LCCR3_OEP*1) /* Output Enable active Low */ - -#ifndef __ASSEMBLY__ -extern unsigned int processor_id; -#endif - -#define CPU_REVISION (processor_id & 15) -#define CPU_SA1110_A0 (0) -#define CPU_SA1110_B0 (4) -#define CPU_SA1110_B1 (5) -#define CPU_SA1110_B2 (6) -#define CPU_SA1110_B4 (8) - -#define CPU_SA1100_ID (0x4401a110) -#define CPU_SA1100_MASK (0xfffffff0) -#define CPU_SA1110_ID (0x6901b110) -#define CPU_SA1110_MASK (0xfffffff0) diff --git a/arch/arm/mach-sa1100/include/mach/hardware.h b/arch/arm/mach-sa1100/include/mach/hardware.h index 5976435f42c..b70846c096a 100644 --- a/arch/arm/mach-sa1100/include/mach/hardware.h +++ b/arch/arm/mach-sa1100/include/mach/hardware.h @@ -36,8 +36,26 @@ #define io_v2p( x ) \ ( (((x)&0x00ffffff) | (((x)&(0x30000000>>VIO_SHIFT))<<VIO_SHIFT)) + PIO_START ) +#define CPU_SA1110_A0 (0) +#define CPU_SA1110_B0 (4) +#define CPU_SA1110_B1 (5) +#define CPU_SA1110_B2 (6) +#define CPU_SA1110_B4 (8) + +#define CPU_SA1100_ID (0x4401a110) +#define CPU_SA1100_MASK (0xfffffff0) +#define CPU_SA1110_ID (0x6901b110) +#define CPU_SA1110_MASK (0xfffffff0) + #ifndef __ASSEMBLY__ +#include <asm/cputype.h> + +#define CPU_REVISION (read_cpuid_id() & 15) + +#define cpu_is_sa1100() ((read_cpuid_id() & CPU_SA1100_MASK) == CPU_SA1100_ID) +#define cpu_is_sa1110() ((read_cpuid_id() & CPU_SA1110_MASK) == CPU_SA1110_ID) + # define __REG(x) (*((volatile unsigned long *)io_p2v(x))) # define __PREG(x) (io_v2p((unsigned long)&(x))) |