diff options
| author | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-05-08 14:09:47 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-05-23 18:04:51 +0100 |
| commit | 234b6ceddb4fc2a4bc5b9a7670f070f6e69e0868 (patch) | |
| tree | 891f57ca663b5ec0bb61bb3e38c5306e0d13d2bd /arch/arm/mach-sa1100 | |
| parent | 442c8176d2efa468577738e3a99a6e051f6e8e55 (diff) | |
clocksource: convert ARM 32-bit up counting clocksources
Convert ixp4xx, lpc32xx, mxc, netx, pxa, sa1100, tcc8k, tegra and u300
to use the generic mmio clocksource recently introduced.
Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: Krzysztof Halasa <khc@pm.waw.pl>
Acked-by: Eric Miao <eric.y.miao@gmail.com>
Acked-by: "Hans J. Koch" <hjk@hansjkoch.de>
Acked-by: Colin Cross <ccross@android.com>
Cc: Erik Gilling <konkers@android.com>
Cc: Olof Johansson <olof@lixom.net>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-sa1100')
| -rw-r--r-- | arch/arm/mach-sa1100/time.c | 16 |
1 files changed, 2 insertions, 14 deletions
diff --git a/arch/arm/mach-sa1100/time.c b/arch/arm/mach-sa1100/time.c index 51c05292d14..fa6602491d5 100644 --- a/arch/arm/mach-sa1100/time.c +++ b/arch/arm/mach-sa1100/time.c @@ -97,19 +97,6 @@ static struct clock_event_device ckevt_sa1100_osmr0 = { .set_mode = sa1100_osmr0_set_mode, }; -static cycle_t sa1100_read_oscr(struct clocksource *s) -{ - return OSCR; -} - -static struct clocksource cksrc_sa1100_oscr = { - .name = "oscr", - .rating = 200, - .read = sa1100_read_oscr, - .mask = CLOCKSOURCE_MASK(32), - .flags = CLOCK_SOURCE_IS_CONTINUOUS, -}; - static struct irqaction sa1100_timer_irq = { .name = "ost0", .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, @@ -134,7 +121,8 @@ static void __init sa1100_timer_init(void) setup_irq(IRQ_OST0, &sa1100_timer_irq); - clocksource_register_hz(&cksrc_sa1100_oscr, CLOCK_TICK_RATE); + clocksource_mmio_init(&OSCR, "oscr", CLOCK_TICK_RATE, 200, 32, + clocksource_mmio_readl_up); clockevents_register_device(&ckevt_sa1100_osmr0); } |