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authorPhil Edworthy <phil.edworthy@renesas.com>2013-01-31 02:45:01 +0100
committerSimon Horman <horms+renesas@verge.net.au>2013-03-18 21:22:34 +0900
commitd75bc78b508d0a95d7738290d8ec9923691f4301 (patch)
treef341e28b8168b37da94982820d10e907d511088c /arch/arm/mach-shmobile/clock-r8a7779.c
parentd60cd5f16b5af62672209eddd64f70be3f68d17b (diff)
r8a7779: Add Display Unit clock support
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> [Rename device from to rcarfb to rcar-du] Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> [Manual conflict resolution] Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/mach-shmobile/clock-r8a7779.c')
-rw-r--r--arch/arm/mach-shmobile/clock-r8a7779.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm/mach-shmobile/clock-r8a7779.c b/arch/arm/mach-shmobile/clock-r8a7779.c
index 0f66d356e1b..d9edeaf6600 100644
--- a/arch/arm/mach-shmobile/clock-r8a7779.c
+++ b/arch/arm/mach-shmobile/clock-r8a7779.c
@@ -88,7 +88,7 @@ static struct clk div4_clks[DIV4_NR] = {
enum { MSTP323, MSTP322, MSTP321, MSTP320,
MSTP115,
- MSTP101, MSTP100,
+ MSTP103, MSTP101, MSTP100,
MSTP030,
MSTP029, MSTP028, MSTP027, MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021,
MSTP016, MSTP015, MSTP014,
@@ -101,6 +101,7 @@ static struct clk mstp_clks[MSTP_NR] = {
[MSTP321] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 21, 0), /* SDHI2 */
[MSTP320] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR3, 20, 0), /* SDHI3 */
[MSTP115] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 15, 0), /* SATA */
+ [MSTP103] = SH_CLK_MSTP32(&div4_clks[DIV4_S], MSTPCR1, 3, 0), /* DU */
[MSTP101] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 1, 0), /* USB2 */
[MSTP100] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 0, 0), /* USB0/1 */
[MSTP030] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 30, 0), /* I2C0 */
@@ -184,6 +185,7 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP322]), /* SDHI1 */
CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP321]), /* SDHI2 */
CLKDEV_DEV_ID("sh_mobile_sdhi.3", &mstp_clks[MSTP320]), /* SDHI3 */
+ CLKDEV_DEV_ID("rcar-du.0", &mstp_clks[MSTP103]), /* DU */
};
void __init r8a7779_clock_init(void)