diff options
| author | Magnus Damm <damm@opensource.se> | 2013-09-04 12:46:17 +0900 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2013-09-30 16:11:20 +0900 |
| commit | 1bebd72a71e4ea1e9f68a9e71faee724c5e8f903 (patch) | |
| tree | d9bfdfeb965085b91dfce6f50dbd8885ff8a78fc /arch/arm/mach-shmobile/clock-r8a7791.c | |
| parent | e6491d08ed1d5d1e415d5371f2ff2fed67df83b0 (diff) | |
ARM: shmobile: r8a7791 CMT support
Add r8a7791 CMT support via channel 0 of CMT0. At this
point the CMT is used for clock event operation, but in
the future the arch timer will be the main timer and the
CMT will be used for deep sleep wake up only.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
(cherry picked from commit a7663b88280d00359715817620798e99d54d401c)
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/mach-shmobile/clock-r8a7791.c')
| -rw-r--r-- | arch/arm/mach-shmobile/clock-r8a7791.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/arch/arm/mach-shmobile/clock-r8a7791.c b/arch/arm/mach-shmobile/clock-r8a7791.c index df3122ea4c6..c9a26f16ce5 100644 --- a/arch/arm/mach-shmobile/clock-r8a7791.c +++ b/arch/arm/mach-shmobile/clock-r8a7791.c @@ -101,7 +101,7 @@ SH_FIXED_RATIO_CLK_SET(cp_clk, extal_clk, 1, 2); SH_FIXED_RATIO_CLK_SET(pll1_div2_clk, pll1_clk, 1, 2); SH_FIXED_RATIO_CLK_SET(hp_clk, pll1_clk, 1, 12); SH_FIXED_RATIO_CLK_SET(p_clk, pll1_clk, 1, 24); - +SH_FIXED_RATIO_CLK_SET(rclk_clk, pll1_clk, 1, (48 * 1024)); SH_FIXED_RATIO_CLK_SET(mp_clk, pll1_div2_clk, 1, 15); static struct clk *main_clks[] = { @@ -113,6 +113,7 @@ static struct clk *main_clks[] = { &pll3_clk, &hp_clk, &p_clk, + &rclk_clk, &mp_clk, &cp_clk, }; @@ -123,6 +124,7 @@ enum { MSTP719, MSTP718, MSTP715, MSTP714, MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP1105, MSTP1106, MSTP1107, + MSTP124, MSTP_NR }; @@ -142,6 +144,7 @@ static struct clk mstp_clks[MSTP_NR] = { [MSTP1105] = SH_CLK_MSTP32(&mp_clk, SMSTPCR11, 5, 0), /* SCIFA3 */ [MSTP1106] = SH_CLK_MSTP32(&mp_clk, SMSTPCR11, 6, 0), /* SCIFA4 */ [MSTP1107] = SH_CLK_MSTP32(&mp_clk, SMSTPCR11, 7, 0), /* SCIFA5 */ + [MSTP124] = SH_CLK_MSTP32(&rclk_clk, SMSTPCR1, 24, 0), /* CMT0 */ }; static struct clk_lookup lookups[] = { @@ -155,6 +158,7 @@ static struct clk_lookup lookups[] = { CLKDEV_CON_ID("pll3", &pll3_clk), CLKDEV_CON_ID("hp", &hp_clk), CLKDEV_CON_ID("p", &p_clk), + CLKDEV_CON_ID("rclk", &rclk_clk), CLKDEV_CON_ID("mp", &mp_clk), CLKDEV_CON_ID("cp", &cp_clk), CLKDEV_CON_ID("peripheral_clk", &hp_clk), @@ -175,6 +179,7 @@ static struct clk_lookup lookups[] = { CLKDEV_DEV_ID("sh-sci.12", &mstp_clks[MSTP1105]), /* SCIFA3 */ CLKDEV_DEV_ID("sh-sci.13", &mstp_clks[MSTP1106]), /* SCIFA4 */ CLKDEV_DEV_ID("sh-sci.14", &mstp_clks[MSTP1107]), /* SCIFA5 */ + CLKDEV_DEV_ID("sh_cmt.0", &mstp_clks[MSTP124]), }; #define R8A7791_CLOCK_ROOT(e, m, p0, p1, p30, p31) \ |