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authorKuninori Morimoto <kuninori.morimoto.gx@renesas.com>2013-03-27 00:55:54 -0700
committerSimon Horman <horms+renesas@verge.net.au>2013-04-02 11:02:16 +0900
commit99fb32b88be4e9b12c44f61b613a0936a62454b7 (patch)
tree1d7f7c70746029989f3ce411a9d21d5f40da3216 /arch/arm/mach-shmobile/clock-sh7372.c
parentf5942c76217e3f4c2a62a72c9d64997b8765f9e2 (diff)
ARM: shmobile: sh7372: use fixed ratio clock
Current clock-sh7372 is using own implement for each divX clocks. This patch switches to use fixed ratio clock, and was tesed on mackerel board. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/mach-shmobile/clock-sh7372.c')
-rw-r--r--arch/arm/mach-shmobile/clock-sh7372.c44
1 files changed, 7 insertions, 37 deletions
diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c
index 6c23e3f22d6..7e105932c09 100644
--- a/arch/arm/mach-shmobile/clock-sh7372.c
+++ b/arch/arm/mach-shmobile/clock-sh7372.c
@@ -21,6 +21,7 @@
#include <linux/io.h>
#include <linux/sh_clk.h>
#include <linux/clkdev.h>
+#include <mach/clock.h>
#include <mach/common.h>
/* SH7372 registers */
@@ -83,39 +84,12 @@ struct clk sh7372_extal2_clk = {
.rate = 48000000,
};
-/* A fixed divide-by-2 block */
-static unsigned long div2_recalc(struct clk *clk)
-{
- return clk->parent->rate / 2;
-}
-
-static struct sh_clk_ops div2_clk_ops = {
- .recalc = div2_recalc,
-};
+SH_CLK_RATIO(div2, 1, 2);
-/* Divide dv_clki by two */
-struct clk sh7372_dv_clki_div2_clk = {
- .ops = &div2_clk_ops,
- .parent = &sh7372_dv_clki_clk,
-};
-
-/* Divide extal1 by two */
-static struct clk extal1_div2_clk = {
- .ops = &div2_clk_ops,
- .parent = &sh7372_extal1_clk,
-};
-
-/* Divide extal2 by two */
-static struct clk extal2_div2_clk = {
- .ops = &div2_clk_ops,
- .parent = &sh7372_extal2_clk,
-};
-
-/* Divide extal2 by four */
-static struct clk extal2_div4_clk = {
- .ops = &div2_clk_ops,
- .parent = &extal2_div2_clk,
-};
+SH_FIXED_RATIO_CLKg(sh7372_dv_clki_div2_clk, sh7372_dv_clki_clk, div2);
+SH_FIXED_RATIO_CLK(extal1_div2_clk, sh7372_extal1_clk, div2);
+SH_FIXED_RATIO_CLK(extal2_div2_clk, sh7372_extal2_clk, div2);
+SH_FIXED_RATIO_CLK(extal2_div4_clk, extal2_div2_clk, div2);
/* PLLC0 and PLLC1 */
static unsigned long pllc01_recalc(struct clk *clk)
@@ -147,10 +121,7 @@ static struct clk pllc1_clk = {
};
/* Divide PLLC1 by two */
-static struct clk pllc1_div2_clk = {
- .ops = &div2_clk_ops,
- .parent = &pllc1_clk,
-};
+SH_FIXED_RATIO_CLK(pllc1_div2_clk, pllc1_clk, div2);
/* PLLC2 */
@@ -650,5 +621,4 @@ void __init sh7372_clock_init(void)
shmobile_clk_init();
else
panic("failed to setup sh7372 clocks\n");
-
}