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authorMagnus Damm <damm@opensource.se>2010-12-21 08:37:32 +0000
committerPaul Mundt <lethal@linux-sh.org>2010-12-22 13:46:12 +0900
commit5f53a56af50c002cdb091914aa98df80b1b28ec8 (patch)
treed169397ef9af6949b19bf3e430a2dfb5bd80d113 /arch/arm/mach-shmobile/include
parent8bcee1832d23869c2cdb6886ae5210b0143256f0 (diff)
ARM: mach-shmobile: sh73a0 INTCS support
Add INTCS support for the sh73a0 processor. The interrupts on the sh73a0 processor are managed through controllers such as GIC, INTCS and INTCA. The ARM cores use the GIC as primary interrupt controller and the INTCS and INTCA are hanging off the GIC as cascaded interrupt controllers. Peripherals connected both to the GIC and the INTC controllers should if possible only use the GIC. If no GIC connection is available then INTCS and INTCA may be used instead. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/arm/mach-shmobile/include')
-rw-r--r--arch/arm/mach-shmobile/include/mach/common.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
index 15932fd2435..49ac8ebdc18 100644
--- a/arch/arm/mach-shmobile/include/mach/common.h
+++ b/arch/arm/mach-shmobile/include/mach/common.h
@@ -30,6 +30,7 @@ extern void sh7372_pinmux_init(void);
extern struct clk sh7372_extal1_clk;
extern struct clk sh7372_extal2_clk;
+extern void sh73a0_init_irq(void);
extern void sh73a0_add_early_devices(void);
extern void sh73a0_add_standard_devices(void);
extern void sh73a0_clock_init(void);