diff options
author | Simon Horman <horms+renesas@verge.net.au> | 2013-08-06 17:56:43 +0900 |
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committer | Simon Horman <horms+renesas@verge.net.au> | 2013-08-06 17:56:43 +0900 |
commit | 21c7a134051f2f753d359a02923223ad9181da31 (patch) | |
tree | 15b4e72ba4f159ad3ca4e00540b19e8715243d2a /arch/arm/mach-shmobile | |
parent | 81b9d5351fa96caad4accc6711bc1b9342927d4a (diff) | |
parent | 93d8a6fbe69a629a7bb37bb546699a5c49963dc5 (diff) |
Merge tag 'renesas-fixes-for-v3.12' into soc2-base
Renesas ARM based SoC fixes for v3.12
* Fix TPU clock name for r8a7740 SoC
* Update romImage to relocate appended DTB
* Thumb fixes
Diffstat (limited to 'arch/arm/mach-shmobile')
-rw-r--r-- | arch/arm/mach-shmobile/clock-r8a7740.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-shmobile/headsmp-scu.S | 4 | ||||
-rw-r--r-- | arch/arm/mach-shmobile/headsmp.S | 6 | ||||
-rw-r--r-- | arch/arm/mach-shmobile/include/mach/zboot.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-shmobile/sleep-sh7372.S | 2 |
5 files changed, 11 insertions, 5 deletions
diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c index de10fd78bf2..f4265e52432 100644 --- a/arch/arm/mach-shmobile/clock-r8a7740.c +++ b/arch/arm/mach-shmobile/clock-r8a7740.c @@ -596,7 +596,7 @@ static struct clk_lookup lookups[] = { CLKDEV_DEV_ID("e6bd0000.mmcif", &mstp_clks[MSTP312]), CLKDEV_DEV_ID("r8a7740-gether", &mstp_clks[MSTP309]), CLKDEV_DEV_ID("e9a00000.sh-eth", &mstp_clks[MSTP309]), - CLKDEV_DEV_ID("renesas_tpu_pwm", &mstp_clks[MSTP304]), + CLKDEV_DEV_ID("renesas-tpu-pwm", &mstp_clks[MSTP304]), CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP415]), CLKDEV_DEV_ID("e6870000.sdhi", &mstp_clks[MSTP415]), diff --git a/arch/arm/mach-shmobile/headsmp-scu.S b/arch/arm/mach-shmobile/headsmp-scu.S index 6f986546725..0a77488df87 100644 --- a/arch/arm/mach-shmobile/headsmp-scu.S +++ b/arch/arm/mach-shmobile/headsmp-scu.S @@ -38,13 +38,15 @@ ENTRY(shmobile_boot_scu) lsl r1, r1, #3 @ we will shift by cpu_id * 8 bits ldr r2, [r0, #8] @ SCU Power Status Register mov r3, #3 - bic r2, r2, r3, lsl r1 @ Clear bits of our CPU (Run Mode) + lsl r3, r3, r1 + bic r2, r2, r3 @ Clear bits of our CPU (Run Mode) str r2, [r0, #8] @ write back b shmobile_invalidate_start ENDPROC(shmobile_boot_scu) .text + .align 2 .globl shmobile_scu_base shmobile_scu_base: .space 4 diff --git a/arch/arm/mach-shmobile/headsmp.S b/arch/arm/mach-shmobile/headsmp.S index 559d1ce5f57..dfb41dfc894 100644 --- a/arch/arm/mach-shmobile/headsmp.S +++ b/arch/arm/mach-shmobile/headsmp.S @@ -26,12 +26,16 @@ ENDPROC(shmobile_invalidate_start) * This will be mapped at address 0 by SBAR register. * We need _long_ jump to the physical address. */ + .arm .align 12 ENTRY(shmobile_boot_vector) ldr r0, 2f - ldr pc, 1f + ldr r1, 1f + bx r1 + ENDPROC(shmobile_boot_vector) + .align 2 .globl shmobile_boot_fn shmobile_boot_fn: 1: .space 4 diff --git a/arch/arm/mach-shmobile/include/mach/zboot.h b/arch/arm/mach-shmobile/include/mach/zboot.h index f2d8744c1f1..c3c4669a2d7 100644 --- a/arch/arm/mach-shmobile/include/mach/zboot.h +++ b/arch/arm/mach-shmobile/include/mach/zboot.h @@ -1,7 +1,6 @@ #ifndef ZBOOT_H #define ZBOOT_H -#include <asm/mach-types.h> #include <mach/zboot_macros.h> /************************************************** @@ -11,7 +10,6 @@ **************************************************/ #ifdef CONFIG_MACH_MACKEREL -#define MACH_TYPE MACH_TYPE_MACKEREL #define MEMORY_START 0x40000000 #include "mach/head-mackerel.txt" #else diff --git a/arch/arm/mach-shmobile/sleep-sh7372.S b/arch/arm/mach-shmobile/sleep-sh7372.S index 53f4840e494..9782862899e 100644 --- a/arch/arm/mach-shmobile/sleep-sh7372.S +++ b/arch/arm/mach-shmobile/sleep-sh7372.S @@ -41,6 +41,7 @@ sh7372_resume_core_standby_sysc: ldr pc, 1f + .align 2 .globl sh7372_cpu_resume sh7372_cpu_resume: 1: .space 4 @@ -96,6 +97,7 @@ sh7372_do_idle_sysc: 1: b 1b + .align 2 kernel_flush: .word v7_flush_dcache_all #endif |