diff options
author | Arnd Bergmann <arnd@arndb.de> | 2011-10-31 23:42:23 +0100 |
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committer | Arnd Bergmann <arnd@arndb.de> | 2011-10-31 23:42:23 +0100 |
commit | eed1e576507b52e03e549e0c9e0c747978122403 (patch) | |
tree | 69a7ecac041f83b0299f55a760f4f0cd5767ae05 /arch/arm/mach-ux500/cpu.c | |
parent | 65af7c4608f7b7019e2faa220fb9624988965873 (diff) | |
parent | 76525ec214449318f793ff05fa5b0ecd0afe41cd (diff) |
Merge branch 'stericsson/cleanup' into next/timer
The timer and cleanup branches from stericsson conflict,
so I'm merging them here.
Conflicts:
arch/arm/mach-ux500/Makefile
arch/arm/mach-ux500/cpu.c
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-ux500/cpu.c')
-rw-r--r-- | arch/arm/mach-ux500/cpu.c | 69 |
1 files changed, 0 insertions, 69 deletions
diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c index 797f3642fc3..1405d0eb7ed 100644 --- a/arch/arm/mach-ux500/cpu.c +++ b/arch/arm/mach-ux500/cpu.c @@ -12,8 +12,6 @@ #include <linux/mfd/db5500-prcmu.h> #include <linux/clksrc-dbx500-prcmu.h> -#include <asm/cacheflush.h> -#include <asm/hardware/cache-l2x0.h> #include <asm/hardware/gic.h> #include <asm/mach/map.h> #include <asm/localtimer.h> @@ -26,10 +24,6 @@ void __iomem *_PRCMU_BASE; -#ifdef CONFIG_CACHE_L2X0 -static void __iomem *l2x0_base; -#endif - void __init ux500_init_irq(void) { void __iomem *dist_base; @@ -56,66 +50,3 @@ void __init ux500_init_irq(void) prcmu_early_init(); clk_init(); } - -#ifdef CONFIG_CACHE_L2X0 -static inline void ux500_cache_wait(void __iomem *reg, unsigned long mask) -{ - /* wait for the operation to complete */ - while (readl_relaxed(reg) & mask) - ; -} - -static inline void ux500_cache_sync(void) -{ - void __iomem *base = l2x0_base; - - writel_relaxed(0, base + L2X0_CACHE_SYNC); - ux500_cache_wait(base + L2X0_CACHE_SYNC, 1); -} - -/* - * The L2 cache cannot be turned off in the non-secure world. - * Dummy until a secure service is in place. - */ -static void ux500_l2x0_disable(void) -{ -} - -/* - * This is only called when doing a kexec, just after turning off the L2 - * and L1 cache, and it is surrounded by a spinlock in the generic version. - * However, we're not really turning off the L2 cache right now and the - * PL310 does not support exclusive accesses (used to implement the spinlock). - * So, the invalidation needs to be done without the spinlock. - */ -static void ux500_l2x0_inv_all(void) -{ - void __iomem *base = l2x0_base; - uint32_t l2x0_way_mask = (1<<16) - 1; /* Bitmask of active ways */ - - /* invalidate all ways */ - writel_relaxed(l2x0_way_mask, base + L2X0_INV_WAY); - ux500_cache_wait(base + L2X0_INV_WAY, l2x0_way_mask); - ux500_cache_sync(); -} - -static int ux500_l2x0_init(void) -{ - if (cpu_is_u5500()) - l2x0_base = __io_address(U5500_L2CC_BASE); - else if (cpu_is_u8500()) - l2x0_base = __io_address(U8500_L2CC_BASE); - else - ux500_unknown_soc(); - - /* 64KB way size, 8 way associativity, force WA */ - l2x0_init(l2x0_base, 0x3e060000, 0xc0000fff); - - /* Override invalidate function */ - outer_cache.disable = ux500_l2x0_disable; - outer_cache.inv_all = ux500_l2x0_inv_all; - - return 0; -} -early_initcall(ux500_l2x0_init); -#endif |