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authorWill Deacon <will.deacon@arm.com>2010-09-14 09:53:02 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-09-17 10:16:52 +0100
commita672e99b129e286df2e2697a1b603d82321117f3 (patch)
tree3307cdb68df62a67d78309ecdf6c35cab7321892 /arch/arm/mach-vexpress/ct-ca9x4.c
parent9f05027c7cb3cfe56a31892bd83391138d41a667 (diff)
ARM: 6389/1: errata: incorrect hazard handling in the SCU may lead to data corruption
On the r2p0, r2p1 and r2p2 versions of the Cortex-A9, data corruption can occur if a shared cache line is replaced on one CPU as another CPU is accessing it. This workaround sets two bits in the diagnostic register of the Cortex-A9, reducing the linefill issuing capabilities of the processor and avoiding the erroneous behaviour. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-vexpress/ct-ca9x4.c')
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