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| author | Chris Wilson <chris@chris-wilson.co.uk> | 2010-10-19 09:13:00 +0100 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2010-10-19 09:14:50 +0100 |
| commit | fb9a90f7c674f3ddef6baf55cb1612dadd8ea752 (patch) | |
| tree | f25cf2ce17449ba34cdfdfb948134eb3464e400e /arch/arm/mach-vexpress/ct-ca9x4.c | |
| parent | 2d7b8366ae4a9ec2183c30e432a4a9a495c82bcd (diff) | |
| parent | 21c74a8ea8b47eb6c3c621e36578f6e27f65c5c7 (diff) | |
Merge remote branch 'airlied/drm-core-next' into tmp
Diffstat (limited to 'arch/arm/mach-vexpress/ct-ca9x4.c')
| -rw-r--r-- | arch/arm/mach-vexpress/ct-ca9x4.c | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/arch/arm/mach-vexpress/ct-ca9x4.c b/arch/arm/mach-vexpress/ct-ca9x4.c index 577df6cccb0..71fb1734952 100644 --- a/arch/arm/mach-vexpress/ct-ca9x4.c +++ b/arch/arm/mach-vexpress/ct-ca9x4.c @@ -68,7 +68,7 @@ static void __init ct_ca9x4_init_irq(void) } #if 0 -static void ct_ca9x4_timer_init(void) +static void __init ct_ca9x4_timer_init(void) { writel(0, MMIO_P2V(CT_CA9X4_TIMER0) + TIMER_CTRL); writel(0, MMIO_P2V(CT_CA9X4_TIMER1) + TIMER_CTRL); @@ -222,12 +222,18 @@ static struct platform_device pmu_device = { .resource = pmu_resources, }; -static void ct_ca9x4_init(void) +static void __init ct_ca9x4_init(void) { int i; #ifdef CONFIG_CACHE_L2X0 - l2x0_init(MMIO_P2V(CT_CA9X4_L2CC), 0x00000000, 0xfe0fffff); + void __iomem *l2x0_base = MMIO_P2V(CT_CA9X4_L2CC); + + /* set RAM latencies to 1 cycle for this core tile. */ + writel(0, l2x0_base + L2X0_TAG_LATENCY_CTRL); + writel(0, l2x0_base + L2X0_DATA_LATENCY_CTRL); + + l2x0_init(l2x0_base, 0x00400000, 0xfe0fffff); #endif clkdev_add_table(lookups, ARRAY_SIZE(lookups)); |