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| author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2005-06-08 15:28:24 +0100 |
|---|---|---|
| committer | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2005-06-08 15:28:24 +0100 |
| commit | f8f98a9335db4a7d6285b785180fad720bf22864 (patch) | |
| tree | 201cf5ce682812b0ed15544269930c0d45e1a42f /arch/arm/mm/Kconfig | |
| parent | 17d82fcc6a15887b7138d35802ab8fc5f249794f (diff) | |
[PATCH] ARM: Fix Xscale copy_page implementation
The ARM copypage changes in 2.6.12-rc4-git1 removed the preempt locking
from the copypage functions which broke the XScale implementation.
This patch fixes the locking on XScale and removes the now unneeded
minicache code.
Signed-off-by: Russell King <rmk@arm.linux.org.uk>
Checked-by: Richard Purdie
Diffstat (limited to 'arch/arm/mm/Kconfig')
| -rw-r--r-- | arch/arm/mm/Kconfig | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 48bac7da8c7..ade0e2222f5 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -228,7 +228,6 @@ config CPU_SA1100 select CPU_CACHE_V4WB select CPU_CACHE_VIVT select CPU_TLB_V4WB - select CPU_MINICACHE # XScale config CPU_XSCALE @@ -239,7 +238,6 @@ config CPU_XSCALE select CPU_ABRT_EV5T select CPU_CACHE_VIVT select CPU_TLB_V4WBI - select CPU_MINICACHE # ARMv6 config CPU_V6 @@ -345,11 +343,6 @@ config CPU_TLB_V4WBI config CPU_TLB_V6 bool -config CPU_MINICACHE - bool - help - Processor has a minicache. - comment "Processor Features" config ARM_THUMB |