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authorLen Brown <len.brown@intel.com>2005-08-23 22:12:23 -0400
committerLen Brown <len.brown@intel.com>2005-08-23 22:12:23 -0400
commit84ffa747520edd4556b136bdfc9df9eb1673ce12 (patch)
tree1cfe20bd31fce1b5b3024384fcb324c3338d1d32 /arch/arm/mm/Kconfig
parent702c7e7626deeabb057b6f529167b65ec2eefbdb (diff)
parent81065e2f415af6c028eac13f481fb9e60a0b487b (diff)
Merge from-linus to-akpm
Diffstat (limited to 'arch/arm/mm/Kconfig')
-rw-r--r--arch/arm/mm/Kconfig2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index afbbeb6f465..db5e47dfc30 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -384,7 +384,7 @@ config CPU_DCACHE_DISABLE
config CPU_DCACHE_WRITETHROUGH
bool "Force write through D-cache"
- depends on (CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM1020) && !CPU_DISABLE_DCACHE
+ depends on (CPU_ARM920T || CPU_ARM922T || CPU_ARM925T || CPU_ARM926T || CPU_ARM1020) && !CPU_DCACHE_DISABLE
default y if CPU_ARM925T
help
Say Y here to use the data cache in writethrough mode. Unless you