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authorIngo Molnar <mingo@elte.hu>2008-10-02 10:21:26 +0200
committerIngo Molnar <mingo@elte.hu>2008-10-02 10:21:26 +0200
commitd6d5aeb661fc14655c417f3582ae7ec52985d2a8 (patch)
tree5e168da05cb28d10b5accc74718428cfd5527201 /arch/arm/mm/Kconfig
parent7e6e178ab1548c8d894a77593e757acf4510b8ba (diff)
parent94aca1dac6f6d21f4b07e4864baf7768cabcc6e7 (diff)
Merge commit 'v2.6.27-rc8' into genirq
Diffstat (limited to 'arch/arm/mm/Kconfig')
-rw-r--r--arch/arm/mm/Kconfig10
1 files changed, 9 insertions, 1 deletions
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index 3a6c8ec34cd..ed15f876c72 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -187,7 +187,7 @@ config CPU_ARM926T
ARCH_AT91SAM9260 || ARCH_AT91SAM9261 || \
ARCH_AT91SAM9263 || ARCH_AT91SAM9RL || \
ARCH_AT91SAM9G20 || ARCH_AT91CAP9 || \
- ARCH_NS9XXX || ARCH_DAVINCI
+ ARCH_NS9XXX || ARCH_DAVINCI || ARCH_MX2
default y if ARCH_VERSATILE_PB || MACH_VERSATILE_AB || \
ARCH_OMAP730 || ARCH_OMAP16XX || \
ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || \
@@ -742,3 +742,11 @@ config CACHE_L2X0
select OUTER_CACHE
help
This option enables the L2x0 PrimeCell.
+
+config CACHE_XSC3L2
+ bool "Enable the L2 cache on XScale3"
+ depends on CPU_XSC3
+ default y
+ select OUTER_CACHE
+ help
+ This option enables the L2 cache on XScale3.