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authorCatalin Marinas <catalin.marinas@arm.com>2011-11-22 17:30:31 +0000
committerCatalin Marinas <catalin.marinas@arm.com>2011-12-08 10:30:40 +0000
commitf7b8156d150f7383b42622a9219b230b36435b4a (patch)
treec06e0ed558f7a9e106920a9f3acbb6bed15017bf /arch/arm/mm/alignment.c
parentc9f27f1026f55b543df260ad8ab84a7bdab7792f (diff)
ARM: LPAE: Add fault handling support
The DFSR and IFSR register format is different when LPAE is enabled. In addition, DFSR and IFSR have similar definitions for the fault type. This modifies the fault code to correctly handle the new format. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm/mm/alignment.c')
-rw-r--r--arch/arm/mm/alignment.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c
index c335c76e0d8..caf14dc059e 100644
--- a/arch/arm/mm/alignment.c
+++ b/arch/arm/mm/alignment.c
@@ -968,7 +968,7 @@ static int __init alignment_init(void)
ai_usermode = safe_usermode(ai_usermode, false);
}
- hook_fault_code(1, do_alignment, SIGBUS, BUS_ADRALN,
+ hook_fault_code(FAULT_CODE_ALIGNMENT, do_alignment, SIGBUS, BUS_ADRALN,
"alignment exception");
/*