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authorIngo Molnar <mingo@elte.hu>2011-12-15 08:21:21 +0100
committerIngo Molnar <mingo@elte.hu>2011-12-15 08:21:30 +0100
commit6a54aebf6978e9f296a4d3da3e40af425163c22e (patch)
tree8217c7114db02d8b69c22fc44880749426949bc3 /arch/arm/mm/cache-l2x0.c
parent067491b7313c41f49607fce782d29344d1472587 (diff)
parentdc47ce90c3a822cd7c9e9339fe4d5f61dcb26b50 (diff)
Merge commit 'v3.2-rc5' into sched/core
Merge reason: Pick up the latest fixes. Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/arm/mm/cache-l2x0.c')
-rw-r--r--arch/arm/mm/cache-l2x0.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 8ac9e9f8479..b1e192ba8c2 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -61,7 +61,7 @@ static inline void cache_sync(void)
{
void __iomem *base = l2x0_base;
-#ifdef CONFIG_ARM_ERRATA_753970
+#ifdef CONFIG_PL310_ERRATA_753970
/* write to an unmmapped register */
writel_relaxed(0, base + L2X0_DUMMY_REG);
#else