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author | Paul Mundt <lethal@linux-sh.org> | 2012-02-24 13:23:23 +0900 |
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committer | Paul Mundt <lethal@linux-sh.org> | 2012-02-24 13:23:23 +0900 |
commit | 35eb304b5cd7b49d581bda79218b8134f3b689ea (patch) | |
tree | 3d75d9ada70814161d035b2f9166fee05d257dfb /arch/arm/mm/cache-v7.S | |
parent | ca0cc30109241f280eb871794620d7cf198bb582 (diff) | |
parent | bb4c7e9a9908548b458f34afb2fee74dc0d49f90 (diff) |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux into rmobile-fixes-for-linus
Diffstat (limited to 'arch/arm/mm/cache-v7.S')
-rw-r--r-- | arch/arm/mm/cache-v7.S | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S index 07c4bc8ea0a..a655d3da386 100644 --- a/arch/arm/mm/cache-v7.S +++ b/arch/arm/mm/cache-v7.S @@ -54,9 +54,15 @@ loop1: and r1, r1, #7 @ mask of the bits for current cache only cmp r1, #2 @ see what cache we have at this level blt skip @ skip if no cache, or just i-cache +#ifdef CONFIG_PREEMPT + save_and_disable_irqs_notrace r9 @ make cssr&csidr read atomic +#endif mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr isb @ isb to sych the new cssr&csidr mrc p15, 1, r1, c0, c0, 0 @ read the new csidr +#ifdef CONFIG_PREEMPT + restore_irqs_notrace r9 +#endif and r2, r1, #7 @ extract the length of the cache lines add r2, r2, #4 @ add 4 (line length offset) ldr r4, =0x3ff |