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authorNicolas Pitre <nico@cam.org>2008-11-04 02:42:27 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-11-28 15:36:43 +0000
commit43ae286b7d4d8c4983bc263ef2e3cccc10dedb2b (patch)
treebe10faffb48904e5bb962fbd45f7cb2ff395caea /arch/arm/mm/copypage-v4wt.c
parent303c6443659bc1dc911356f5de149f48ff1d97b8 (diff)
[ARM] fix a couple clear_user_highpage assembly constraints
In all cases the kaddr is assigned an input register even though it is modified in the assembly code. Let's assign a new variable to the modified value and mark those inline asm with volatile otherwise they get optimized away because the output variable is otherwise not used. Also fix a few conversion errors in copypage-feroceon.c and copypage-v4mc.c. Signed-off-by: Nicolas Pitre <nico@marvell.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mm/copypage-v4wt.c')
-rw-r--r--arch/arm/mm/copypage-v4wt.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/mm/copypage-v4wt.c b/arch/arm/mm/copypage-v4wt.c
index b8a345d6e77..0f1188efae4 100644
--- a/arch/arm/mm/copypage-v4wt.c
+++ b/arch/arm/mm/copypage-v4wt.c
@@ -62,9 +62,9 @@ void v4wt_copy_user_highpage(struct page *to, struct page *from,
*/
void v4wt_clear_user_highpage(struct page *page, unsigned long vaddr)
{
- void *kaddr = kmap_atomic(page, KM_USER0);
- asm("\
- mov r1, %1 @ 1\n\
+ void *ptr, *kaddr = kmap_atomic(page, KM_USER0);
+ asm volatile("\
+ mov r1, %2 @ 1\n\
mov r2, #0 @ 1\n\
mov r3, #0 @ 1\n\
mov ip, #0 @ 1\n\
@@ -76,8 +76,8 @@ void v4wt_clear_user_highpage(struct page *page, unsigned long vaddr)
subs r1, r1, #1 @ 1\n\
bne 1b @ 1\n\
mcr p15, 0, r2, c7, c7, 0 @ flush ID cache"
- :
- : "r" (kaddr), "I" (PAGE_SIZE / 64)
+ : "=r" (ptr)
+ : "0" (kaddr), "I" (PAGE_SIZE / 64)
: "r1", "r2", "r3", "ip", "lr");
kunmap_atomic(kaddr, KM_USER0);
}