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authorRussell King <rmk+kernel@arm.linux.org.uk>2011-06-25 19:25:02 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2011-06-30 11:04:59 +0100
commit8b4186160b7894ca4583f702a562856d5d9e9118 (patch)
treed5937a74e6d3f0738c3ba7eb9383acf51202e62d /arch/arm/mm/pabort-legacy.S
parentb059bdc39321696fe8f344acb7117d57fbd7b475 (diff)
ARM: entry: prefetch abort helper: pass aborted pc in r4 rather than r0
This avoids unnecessary instructions for CPUs which implement the IFAR (instruction fault address register). Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mm/pabort-legacy.S')
-rw-r--r--arch/arm/mm/pabort-legacy.S3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/mm/pabort-legacy.S b/arch/arm/mm/pabort-legacy.S
index 87970eba88e..8a5d8aaf2d5 100644
--- a/arch/arm/mm/pabort-legacy.S
+++ b/arch/arm/mm/pabort-legacy.S
@@ -4,7 +4,7 @@
/*
* Function: legacy_pabort
*
- * Params : r0 = address of aborted instruction
+ * Params : r4 = address of aborted instruction
*
* Returns : r0 = address of abort
* : r1 = Simulated IFSR with section translation fault status
@@ -14,6 +14,7 @@
.align 5
ENTRY(legacy_pabort)
+ mov r0, r4
mov r1, #5
mov pc, lr
ENDPROC(legacy_pabort)