summaryrefslogtreecommitdiffstats
path: root/arch/arm/mm/proc-arm946.S
diff options
context:
space:
mode:
authorTakashi Iwai <tiwai@suse.de>2010-08-18 15:17:30 +0200
committerTakashi Iwai <tiwai@suse.de>2010-08-18 15:17:30 +0200
commit6ab561c8aab2e4af535f09adbc6253f958536848 (patch)
tree37846adb4ea106485720d113e252d71d615c23ed /arch/arm/mm/proc-arm946.S
parent4f4e8f69895c8696a4bcc751817d4b186023ac44 (diff)
parentcbaa9f60d5d5c3af10f94e0d49789d5b82341a4a (diff)
Merge branch 'topic/isa' into topic/misc
Diffstat (limited to 'arch/arm/mm/proc-arm946.S')
-rw-r--r--arch/arm/mm/proc-arm946.S6
1 files changed, 1 insertions, 5 deletions
diff --git a/arch/arm/mm/proc-arm946.S b/arch/arm/mm/proc-arm946.S
index 1664b6aaff7..249a6053760 100644
--- a/arch/arm/mm/proc-arm946.S
+++ b/arch/arm/mm/proc-arm946.S
@@ -44,15 +44,11 @@ ENTRY(cpu_arm946_switch_mm)
* cpu_arm946_proc_fin()
*/
ENTRY(cpu_arm946_proc_fin)
- stmfd sp!, {lr}
- mov ip, #PSR_F_BIT | PSR_I_BIT | SVC_MODE
- msr cpsr_c, ip
- bl arm946_flush_kern_cache_all
mrc p15, 0, r0, c1, c0, 0 @ ctrl register
bic r0, r0, #0x00001000 @ i-cache
bic r0, r0, #0x00000004 @ d-cache
mcr p15, 0, r0, c1, c0, 0 @ disable caches
- ldmfd sp!, {pc}
+ mov pc, lr
/*
* cpu_arm946_reset(loc)