diff options
| author | Linus Torvalds <torvalds@g5.osdl.org> | 2006-03-28 13:53:03 -0800 |
|---|---|---|
| committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-03-28 13:53:03 -0800 |
| commit | ca9ba4471c1203bb6e759b76e83167fec54fe590 (patch) | |
| tree | 8aeb359631742f77f635cb5ff785bea9132502f9 /arch/arm/mm/proc-v6.S | |
| parent | d4965b3e2ff94d0c7b7e6e7e9794b54950a2f4b9 (diff) | |
| parent | c4713074375c61f939310b04e92090afe29810dc (diff) | |
Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm:
[ARM] 3388/1: ixp23xx: add core ixp23xx support
[ARM] 3417/1: add support for logicpd pxa270 card engine
[ARM] 3387/1: ixp23xx: add defconfig
[ARM] 3377/2: add support for intel xsc3 core
[ARM] Move ice-dcc code into misc.c
[ARM] Fix decompressor serial IO to give CRLF not LFCR
[ARM] proc-v6: mark page table walks outer-cacheable, shared. Enable NX.
[ARM] nommu: trivial patch for arch/arm/lib/Makefile
[ARM] 3416/1: Update LART site URL
[ARM] 3415/1: Akita: Add missing EXPORT_SYMBOL
[ARM] 3414/1: ep93xx: reset ethernet controller before uncompressing
Diffstat (limited to 'arch/arm/mm/proc-v6.S')
| -rw-r--r-- | arch/arm/mm/proc-v6.S | 16 |
1 files changed, 12 insertions, 4 deletions
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S index 9a7e7c096aa..ee6f1529873 100644 --- a/arch/arm/mm/proc-v6.S +++ b/arch/arm/mm/proc-v6.S @@ -21,6 +21,14 @@ #define D_CACHE_LINE_SIZE 32 +#define TTB_C (1 << 0) +#define TTB_S (1 << 1) +#define TTB_IMP (1 << 2) +#define TTB_RGN_NC (0 << 3) +#define TTB_RGN_WBWA (1 << 3) +#define TTB_RGN_WT (2 << 3) +#define TTB_RGN_WB (3 << 3) + .macro cpsie, flags .ifc \flags, f .long 0xf1080040 @@ -115,7 +123,7 @@ ENTRY(cpu_v6_switch_mm) mov r2, #0 ldr r1, [r1, #MM_CONTEXT_ID] @ get mm->context.id #ifdef CONFIG_SMP - orr r0, r0, #2 @ set shared pgtable + orr r0, r0, #TTB_RGN_WBWA|TTB_S @ mark PTWs shared, outer cacheable #endif mcr p15, 0, r2, c7, c5, 6 @ flush BTAC/BTB mcr p15, 0, r2, c7, c10, 4 @ drain write buffer @@ -161,8 +169,8 @@ ENTRY(cpu_v6_set_pte) tst r1, #L_PTE_YOUNG biceq r2, r2, #PTE_EXT_APX | PTE_EXT_AP_MASK -@ tst r1, #L_PTE_EXEC -@ orreq r2, r2, #PTE_EXT_XN + tst r1, #L_PTE_EXEC + orreq r2, r2, #PTE_EXT_XN tst r1, #L_PTE_PRESENT moveq r2, #0 @@ -221,7 +229,7 @@ __v6_setup: mcr p15, 0, r0, c8, c7, 0 @ invalidate I + D TLBs mcr p15, 0, r0, c2, c0, 2 @ TTB control register #ifdef CONFIG_SMP - orr r4, r4, #2 @ set shared pgtable + orr r4, r4, #TTB_RGN_WBWA|TTB_S @ mark PTWs shared, outer cacheable #endif mcr p15, 0, r4, c2, c0, 1 @ load TTB1 #ifdef CONFIG_VFP |