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author | Soren Brinkmann <soren.brinkmann@xilinx.com> | 2013-07-31 16:24:59 -0700 |
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committer | Michal Simek <michal.simek@xilinx.com> | 2013-08-13 16:37:35 +0200 |
commit | 39c41df9c1950fba0ee6a4e7a63be281e89fe437 (patch) | |
tree | 793a5765c09ff57451c33a255aa0575be950cf51 /arch/arm/mm/proc-v7-3level.S | |
parent | d4e4ab86bcba5a72779c43dc1459f71fea3d89c8 (diff) |
arm: zynq: dt: Set correct L2 ram latencies
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch/arm/mm/proc-v7-3level.S')
0 files changed, 0 insertions, 0 deletions