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| author | Dmitry Torokhov <dmitry.torokhov@gmail.com> | 2012-03-09 10:55:17 -0800 |
|---|---|---|
| committer | Dmitry Torokhov <dmitry.torokhov@gmail.com> | 2012-03-09 10:55:17 -0800 |
| commit | b675b3667f6729dcd1036a2a129b35445947f905 (patch) | |
| tree | 0d58791e9063d3ca2c352da6f3e7df2bdb876f9d /arch/arm/mm/proc-xsc3.S | |
| parent | 104a5f3cad8f2f27cadbdf0029400ecd9e17ccc0 (diff) | |
| parent | 192cfd58774b4d17b2fe8bdc77d89c2ef4e0591d (diff) | |
Merge commit 'v3.3-rc6' into next
Diffstat (limited to 'arch/arm/mm/proc-xsc3.S')
| -rw-r--r-- | arch/arm/mm/proc-xsc3.S | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S index abf0507a08a..b0d57869da2 100644 --- a/arch/arm/mm/proc-xsc3.S +++ b/arch/arm/mm/proc-xsc3.S @@ -105,6 +105,7 @@ ENTRY(cpu_xsc3_proc_fin) * loc: location to jump to for soft reset */ .align 5 + .pushsection .idmap.text, "ax" ENTRY(cpu_xsc3_reset) mov r1, #PSR_F_BIT|PSR_I_BIT|SVC_MODE msr cpsr_c, r1 @ reset CPSR @@ -119,6 +120,8 @@ ENTRY(cpu_xsc3_reset) @ already containing those two last instructions to survive. mcr p15, 0, ip, c8, c7, 0 @ invalidate I and D TLBs mov pc, r0 +ENDPROC(cpu_xsc3_reset) + .popsection /* * cpu_xsc3_do_idle() |