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author | Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> | 2012-09-05 10:22:45 -0400 |
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committer | Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> | 2012-09-05 10:22:45 -0400 |
commit | 593d0a3e9f813db910dc50574532914db21d09ff (patch) | |
tree | 12d8413ee57b4383ca8c906996ffe02be6d377a5 /arch/arm/plat-mxc/avic.c | |
parent | 50e900417b8096939d12a46848f965e27a905e36 (diff) | |
parent | 4cb38750d49010ae72e718d46605ac9ba5a851b4 (diff) |
Merge commit '4cb38750d49010ae72e718d46605ac9ba5a851b4' into stable/for-linus-3.6
* commit '4cb38750d49010ae72e718d46605ac9ba5a851b4': (6849 commits)
bcma: fix invalid PMU chip control masks
[libata] pata_cmd64x: whitespace cleanup
libata-acpi: fix up for acpi_pm_device_sleep_state API
sata_dwc_460ex: device tree may specify dma_channel
ahci, trivial: fixed coding style issues related to braces
ahci_platform: add hibernation callbacks
libata-eh.c: local functions should not be exposed globally
libata-transport.c: local functions should not be exposed globally
sata_dwc_460ex: support hardreset
ata: use module_pci_driver
drivers/ata/pata_pcmcia.c: adjust suspicious bit operation
pata_imx: Convert to clk_prepare_enable/clk_disable_unprepare
ahci: Enable SB600 64bit DMA on MSI K9AGM2 (MS-7327) v2
[libata] Prevent interface errors with Seagate FreeAgent GoFlex
drivers/acpi/glue: revert accidental license-related 6b66d95895c bits
libata-acpi: add missing inlines in libata.h
i2c-omap: Add support for I2C_M_STOP message flag
i2c: Fall back to emulated SMBus if the operation isn't supported natively
i2c: Add SCCB support
i2c-tiny-usb: Add support for the Robofuzz OSIF USB/I2C converter
...
Diffstat (limited to 'arch/arm/plat-mxc/avic.c')
-rw-r--r-- | arch/arm/plat-mxc/avic.c | 35 |
1 files changed, 27 insertions, 8 deletions
diff --git a/arch/arm/plat-mxc/avic.c b/arch/arm/plat-mxc/avic.c index 689f81f9593..cbd55c36def 100644 --- a/arch/arm/plat-mxc/avic.c +++ b/arch/arm/plat-mxc/avic.c @@ -19,11 +19,14 @@ #include <linux/module.h> #include <linux/irq.h> +#include <linux/irqdomain.h> #include <linux/io.h> +#include <linux/of.h> #include <mach/common.h> #include <asm/mach/irq.h> #include <asm/exception.h> #include <mach/hardware.h> +#include <mach/irqs.h> #include "irq-common.h" @@ -50,15 +53,19 @@ #define AVIC_NUM_IRQS 64 void __iomem *avic_base; +static struct irq_domain *domain; static u32 avic_saved_mask_reg[2]; #ifdef CONFIG_MXC_IRQ_PRIOR static int avic_irq_set_priority(unsigned char irq, unsigned char prio) { + struct irq_data *d = irq_get_irq_data(irq); unsigned int temp; unsigned int mask = 0x0F << irq % 8 * 4; + irq = d->hwirq; + if (irq >= AVIC_NUM_IRQS) return -EINVAL; @@ -75,8 +82,11 @@ static int avic_irq_set_priority(unsigned char irq, unsigned char prio) #ifdef CONFIG_FIQ static int avic_set_irq_fiq(unsigned int irq, unsigned int type) { + struct irq_data *d = irq_get_irq_data(irq); unsigned int irqt; + irq = d->hwirq; + if (irq >= AVIC_NUM_IRQS) return -EINVAL; @@ -108,7 +118,7 @@ static void avic_irq_suspend(struct irq_data *d) { struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); struct irq_chip_type *ct = gc->chip_types; - int idx = gc->irq_base >> 5; + int idx = d->hwirq >> 5; avic_saved_mask_reg[idx] = __raw_readl(avic_base + ct->regs.mask); __raw_writel(gc->wake_active, avic_base + ct->regs.mask); @@ -118,7 +128,7 @@ static void avic_irq_resume(struct irq_data *d) { struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); struct irq_chip_type *ct = gc->chip_types; - int idx = gc->irq_base >> 5; + int idx = d->hwirq >> 5; __raw_writel(avic_saved_mask_reg[idx], avic_base + ct->regs.mask); } @@ -128,11 +138,10 @@ static void avic_irq_resume(struct irq_data *d) #define avic_irq_resume NULL #endif -static __init void avic_init_gc(unsigned int irq_start) +static __init void avic_init_gc(int idx, unsigned int irq_start) { struct irq_chip_generic *gc; struct irq_chip_type *ct; - int idx = irq_start >> 5; gc = irq_alloc_generic_chip("mxc-avic", 1, irq_start, avic_base, handle_level_irq); @@ -161,7 +170,7 @@ asmlinkage void __exception_irq_entry avic_handle_irq(struct pt_regs *regs) if (nivector == 0xffff) break; - handle_IRQ(nivector, regs); + handle_IRQ(irq_find_mapping(domain, nivector), regs); } while (1); } @@ -172,6 +181,8 @@ asmlinkage void __exception_irq_entry avic_handle_irq(struct pt_regs *regs) */ void __init mxc_init_irq(void __iomem *irqbase) { + struct device_node *np; + int irq_base; int i; avic_base = irqbase; @@ -190,8 +201,16 @@ void __init mxc_init_irq(void __iomem *irqbase) __raw_writel(0, avic_base + AVIC_INTTYPEH); __raw_writel(0, avic_base + AVIC_INTTYPEL); - for (i = 0; i < AVIC_NUM_IRQS; i += 32) - avic_init_gc(i); + irq_base = irq_alloc_descs(-1, 0, AVIC_NUM_IRQS, numa_node_id()); + WARN_ON(irq_base < 0); + + np = of_find_compatible_node(NULL, NULL, "fsl,avic"); + domain = irq_domain_add_legacy(np, AVIC_NUM_IRQS, irq_base, 0, + &irq_domain_simple_ops, NULL); + WARN_ON(!domain); + + for (i = 0; i < AVIC_NUM_IRQS / 32; i++, irq_base += 32) + avic_init_gc(i, irq_base); /* Set default priority value (0) for all IRQ's */ for (i = 0; i < 8; i++) @@ -199,7 +218,7 @@ void __init mxc_init_irq(void __iomem *irqbase) #ifdef CONFIG_FIQ /* Initialize FIQ */ - init_FIQ(); + init_FIQ(FIQ_START); #endif printk(KERN_INFO "MXC IRQ initialized\n"); |