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authorUwe Kleine-König <u.kleine-koenig@pengutronix.de>2010-10-25 15:44:25 +0200
committerUwe Kleine-König <u.kleine-koenig@pengutronix.de>2010-11-17 08:58:11 +0100
commita99631489bbd1b4647b82d0822b6a3942e2dd731 (patch)
tree9af7ee56eea709ae48587ca5409e768fbf68917a /arch/arm/plat-mxc/include/mach/hardware.h
parentcf3a6aba2f8402d4e45f7f263a0e69f779cd1bdc (diff)
ARM: imx: change static io mapping to use a function
Now only the virtual addresses [0xf4000000, 0xf5ffffff] are used for static per-SoC mappings. The few mappings of whole chip selects are moved accordingly. The now wrong defines for virtual base addresses are removed. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Diffstat (limited to 'arch/arm/plat-mxc/include/mach/hardware.h')
-rw-r--r--arch/arm/plat-mxc/include/mach/hardware.h67
1 files changed, 67 insertions, 0 deletions
diff --git a/arch/arm/plat-mxc/include/mach/hardware.h b/arch/arm/plat-mxc/include/mach/hardware.h
index 409cec6223d..dde777c1017 100644
--- a/arch/arm/plat-mxc/include/mach/hardware.h
+++ b/arch/arm/plat-mxc/include/mach/hardware.h
@@ -32,6 +32,73 @@
(((addr) - module ## _BASE_ADDR) < module ## _SIZE ? \
(addr) - (module ## _BASE_ADDR) + (module ## _BASE_ADDR_VIRT) : 0)
+/*
+ * This is rather complicated for humans and ugly to verify, but for a machine
+ * it's OK. Still more as it is usually only applied to constants. The upsides
+ * on using this approach are:
+ *
+ * - same mapping on all i.MX machines
+ * - works for assembler, too
+ * - no need to nurture #defines for virtual addresses
+ *
+ * The downside it, it's hard to verify (but I have a script for that).
+ *
+ * Obviously this needs to be injective for each SoC. In general it maps the
+ * whole address space to [0xf4000000, 0xf5ffffff]. So [0xf6000000,0xfeffffff]
+ * is free for per-machine use (e.g. KZM_ARM11_01 uses 64MiB there).
+ *
+ * It applies the following mappings for the different SoCs:
+ *
+ * mx1:
+ * IO 0x00200000+0x100000 -> 0xf4000000+0x100000
+ * mx21:
+ * AIPI 0x10000000+0x100000 -> 0xf4400000+0x100000
+ * SAHB1 0x80000000+0x100000 -> 0xf4000000+0x100000
+ * X_MEMC 0xdf000000+0x004000 -> 0xf5f00000+0x004000
+ * mx25:
+ * AIPS1 0x43f00000+0x100000 -> 0xf5300000+0x100000
+ * AIPS2 0x53f00000+0x100000 -> 0xf5700000+0x100000
+ * AVIC 0x68000000+0x100000 -> 0xf5800000+0x100000
+ * mx27:
+ * AIPI 0x10000000+0x100000 -> 0xf4400000+0x100000
+ * SAHB1 0x80000000+0x100000 -> 0xf4000000+0x100000
+ * X_MEMC 0xd8000000+0x100000 -> 0xf5c00000+0x100000
+ * mx31:
+ * AIPS1 0x43f00000+0x100000 -> 0xf5300000+0x100000
+ * AIPS2 0x53f00000+0x100000 -> 0xf5700000+0x100000
+ * AVIC 0x68000000+0x100000 -> 0xf5800000+0x100000
+ * X_MEMC 0xb8000000+0x010000 -> 0xf4c00000+0x010000
+ * SPBA0 0x50000000+0x100000 -> 0xf5400000+0x100000
+ * mx35:
+ * AIPS1 0x43f00000+0x100000 -> 0xf5300000+0x100000
+ * AIPS2 0x53f00000+0x100000 -> 0xf5700000+0x100000
+ * AVIC 0x68000000+0x100000 -> 0xf5800000+0x100000
+ * X_MEMC 0xb8000000+0x010000 -> 0xf4c00000+0x010000
+ * SPBA0 0x50000000+0x100000 -> 0xf5400000+0x100000
+ * mx51:
+ * IRAM 0x1ffe0000+0x020000 -> 0xf4fe0000+0x020000
+ * DEBUG 0x60000000+0x100000 -> 0xf5000000+0x100000
+ * SPBA0 0x70000000+0x100000 -> 0xf5400000+0x100000
+ * AIPS1 0x73f00000+0x100000 -> 0xf5700000+0x100000
+ * AIPS2 0x83f00000+0x100000 -> 0xf4300000+0x100000
+ * mxc91231:
+ * L2CC 0x30000000+0x010000 -> 0xf4400000+0x010000
+ * X_MEMC 0xb8000000+0x010000 -> 0xf4c00000+0x010000
+ * ROMP 0x60000000+0x010000 -> 0xf5000000+0x010000
+ * AVIC 0x68000000+0x010000 -> 0xf5800000+0x010000
+ * AIPS1 0x43f00000+0x100000 -> 0xf5300000+0x100000
+ * SPBA0 0x50000000+0x100000 -> 0xf5400000+0x100000
+ * SPBA1 0x52000000+0x100000 -> 0xf5600000+0x100000
+ * AIPS2 0x53f00000+0x100000 -> 0xf5700000+0x100000
+ */
+#define IMX_IO_P2V(x) ( \
+ 0xf4000000 + \
+ (((x) & 0x50000000) >> 6) + \
+ (((x) & 0x0b000000) >> 4) + \
+ (((x) & 0x000fffff)))
+
+#define IMX_IO_ADDRESS(x) IOMEM(IMX_IO_P2V(x))
+
#ifdef CONFIG_ARCH_MX5
#include <mach/mx51.h>
#endif