diff options
| author | Shawn Guo <shawn.guo@linaro.org> | 2011-10-02 15:09:11 +0800 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2011-10-31 14:26:21 +0100 |
| commit | bac89d754ba333453576fd38eb6073d7f89818fe (patch) | |
| tree | b53d79778a231d9cb62cacd97910e03ac93da921 /arch/arm/plat-mxc/include/mach/irqs.h | |
| parent | 7d740f87fd0741c00231a4b13074660d526d5630 (diff) | |
arm/imx6q: add core definitions and low-level debug uart
It adds the core definitions and low-level debug uart support
for imx6q.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/plat-mxc/include/mach/irqs.h')
| -rw-r--r-- | arch/arm/plat-mxc/include/mach/irqs.h | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/arch/arm/plat-mxc/include/mach/irqs.h b/arch/arm/plat-mxc/include/mach/irqs.h index 00e812bbd81..fd9efb04465 100644 --- a/arch/arm/plat-mxc/include/mach/irqs.h +++ b/arch/arm/plat-mxc/include/mach/irqs.h @@ -14,9 +14,15 @@ #include <asm-generic/gpio.h> /* - * SoCs with TZIC interrupt controller have 128 IRQs, those with AVIC have 64 + * SoCs with GIC interrupt controller have 160 IRQs, those with TZIC + * have 128 IRQs, and those with AVIC have 64. + * + * To support single image, the biggest number should be defined on + * top of the list. */ -#ifdef CONFIG_MXC_TZIC +#if defined CONFIG_ARM_GIC +#define MXC_INTERNAL_IRQS 160 +#elif defined CONFIG_MXC_TZIC #define MXC_INTERNAL_IRQS 128 #else #define MXC_INTERNAL_IRQS 64 |