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authorUwe Kleine-König <u.kleine-koenig@pengutronix.de>2010-10-25 15:44:25 +0200
committerUwe Kleine-König <u.kleine-koenig@pengutronix.de>2010-11-17 08:58:11 +0100
commita99631489bbd1b4647b82d0822b6a3942e2dd731 (patch)
tree9af7ee56eea709ae48587ca5409e768fbf68917a /arch/arm/plat-mxc/include/mach/mx21.h
parentcf3a6aba2f8402d4e45f7f263a0e69f779cd1bdc (diff)
ARM: imx: change static io mapping to use a function
Now only the virtual addresses [0xf4000000, 0xf5ffffff] are used for static per-SoC mappings. The few mappings of whole chip selects are moved accordingly. The now wrong defines for virtual base addresses are removed. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Diffstat (limited to 'arch/arm/plat-mxc/include/mach/mx21.h')
-rw-r--r--arch/arm/plat-mxc/include/mach/mx21.h9
1 files changed, 1 insertions, 8 deletions
diff --git a/arch/arm/plat-mxc/include/mach/mx21.h b/arch/arm/plat-mxc/include/mach/mx21.h
index aed0277ebc9..b417e32072f 100644
--- a/arch/arm/plat-mxc/include/mach/mx21.h
+++ b/arch/arm/plat-mxc/include/mach/mx21.h
@@ -26,7 +26,6 @@
#define __MACH_MX21_H__
#define MX21_AIPI_BASE_ADDR 0x10000000
-#define MX21_AIPI_BASE_ADDR_VIRT 0xf4000000
#define MX21_AIPI_SIZE SZ_1M
#define MX21_DMA_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x01000)
#define MX21_WDOG_BASE_ADDR (MX21_AIPI_BASE_ADDR + 0x02000)
@@ -64,7 +63,6 @@
#define MX21_AVIC_BASE_ADDR 0x10040000
#define MX21_SAHB1_BASE_ADDR 0x80000000
-#define MX21_SAHB1_BASE_ADDR_VIRT 0xf4100000
#define MX21_SAHB1_SIZE SZ_1M
#define MX21_CSI_BASE_ADDR (MX2x_SAHB1_BASE_ADDR + 0x0000)
@@ -82,7 +80,6 @@
/* NAND, SDRAM, WEIM etc controllers */
#define MX21_X_MEMC_BASE_ADDR 0xdf000000
-#define MX21_X_MEMC_BASE_ADDR_VIRT 0xf4200000
#define MX21_X_MEMC_SIZE SZ_256K
#define MX21_SDRAMC_BASE_ADDR (MX21_X_MEMC_BASE_ADDR + 0x0000)
@@ -92,10 +89,7 @@
#define MX21_IRAM_BASE_ADDR 0xffffe800 /* internal ram */
-#define MX21_IO_P2V(x) ( \
- IMX_IO_P2V_MODULE(x, MX21_AIPI) ?: \
- IMX_IO_P2V_MODULE(x, MX21_SAHB1) ?: \
- IMX_IO_P2V_MODULE(x, MX21_X_MEMC))
+#define MX21_IO_P2V(x) IMX_IO_P2V(x)
#define MX21_IO_ADDRESS(x) IOMEM(MX21_IO_P2V(x))
/* fixed interrupt numbers */
@@ -197,7 +191,6 @@
#define PCMCIA_MEM_BASE_ADDR MX21_PCMCIA_MEM_BASE_ADDR
#define CS5_BASE_ADDR MX21_CS5_BASE_ADDR
#define X_MEMC_BASE_ADDR MX21_X_MEMC_BASE_ADDR
-#define X_MEMC_BASE_ADDR_VIRT MX21_X_MEMC_BASE_ADDR_VIRT
#define X_MEMC_SIZE MX21_X_MEMC_SIZE
#define SDRAMC_BASE_ADDR MX21_SDRAMC_BASE_ADDR
#define EIM_BASE_ADDR MX21_EIM_BASE_ADDR