diff options
| author | Uwe Kleine-König <u.kleine-koenig@pengutronix.de> | 2010-11-10 22:15:45 +0100 |
|---|---|---|
| committer | Uwe Kleine-König <u.kleine-koenig@pengutronix.de> | 2010-11-17 10:01:38 +0100 |
| commit | 5f3d1092a949b33d01c95b7f5e5a83672629f131 (patch) | |
| tree | 538bea4efeec3c2900a1ca2205d8dca6ea9e3c7b /arch/arm/plat-mxc/include | |
| parent | 224b8c83641c2f31e3efc9bc5956636cc42cadf7 (diff) | |
ARM: mx25: dynamically allocate mxc_pwm devices
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Diffstat (limited to 'arch/arm/plat-mxc/include')
| -rw-r--r-- | arch/arm/plat-mxc/include/mach/devices-common.h | 2 | ||||
| -rw-r--r-- | arch/arm/plat-mxc/include/mach/mx25.h | 8 |
2 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h b/arch/arm/plat-mxc/include/mach/devices-common.h index f5d0000acd6..07223b2cf17 100644 --- a/arch/arm/plat-mxc/include/mach/devices-common.h +++ b/arch/arm/plat-mxc/include/mach/devices-common.h @@ -217,7 +217,9 @@ struct platform_device *__init imx_add_mxc_nand( const struct mxc_nand_platform_data *pdata); struct imx_mxc_pwm_data { + int id; resource_size_t iobase; + resource_size_t iosize; resource_size_t irq; }; struct platform_device *__init imx_add_mxc_pwm( diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/plat-mxc/include/mach/mx25.h index 0d31f828d21..cea851f09ca 100644 --- a/arch/arm/plat-mxc/include/mach/mx25.h +++ b/arch/arm/plat-mxc/include/mach/mx25.h @@ -19,10 +19,14 @@ #define MX25_CRM_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0x80000) #define MX25_GPT1_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0x90000) #define MX25_GPIO4_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0x9c000) +#define MX25_PWM2_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0xa0000) #define MX25_GPIO3_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0xa4000) +#define MX25_PWM3_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0xa8000) +#define MX25_PWM4_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0xc8000) #define MX25_GPIO1_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0xcc000) #define MX25_GPIO2_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0xd0000) #define MX25_WDOG_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0xdc000) +#define MX25_PWM1_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0xe0000) #define MX25_UART1_BASE_ADDR 0x43f90000 #define MX25_UART2_BASE_ADDR 0x43f94000 @@ -66,13 +70,17 @@ #define MX25_INT_UART3 18 #define MX25_INT_KPP 24 #define MX25_INT_DRYICE 25 +#define MX25_INT_PWM1 26 #define MX25_INT_UART2 32 #define MX25_INT_NFC 33 #define MX25_INT_SDMA 34 #define MX25_INT_USB_HS 35 +#define MX25_INT_PWM2 36 #define MX25_INT_USB_OTG 37 #define MX25_INT_LCDC 39 #define MX25_INT_UART5 40 +#define MX25_INT_PWM3 41 +#define MX25_INT_PWM4 42 #define MX25_INT_CAN1 43 #define MX25_INT_CAN2 44 #define MX25_INT_UART1 45 |