summaryrefslogtreecommitdiffstats
path: root/arch/arm/plat-mxc/time.c
diff options
context:
space:
mode:
authorJiri Kosina <jkosina@suse.cz>2011-04-26 10:22:15 +0200
committerJiri Kosina <jkosina@suse.cz>2011-04-26 10:22:59 +0200
commit07f9479a40cc778bc1462ada11f95b01360ae4ff (patch)
tree0676cf38df3844004bb3ebfd99dfa67a4a8998f5 /arch/arm/plat-mxc/time.c
parent9d5e6bdb3013acfb311ab407eeca0b6a6a3dedbf (diff)
parentcd2e49e90f1cae7726c9a2c54488d881d7f1cd1c (diff)
Merge branch 'master' into for-next
Fast-forwarded to current state of Linus' tree as there are patches to be applied for files that didn't exist on the old branch.
Diffstat (limited to 'arch/arm/plat-mxc/time.c')
-rw-r--r--arch/arm/plat-mxc/time.c25
1 files changed, 24 insertions, 1 deletions
diff --git a/arch/arm/plat-mxc/time.c b/arch/arm/plat-mxc/time.c
index 9f0c2610595..2237ff8b434 100644
--- a/arch/arm/plat-mxc/time.c
+++ b/arch/arm/plat-mxc/time.c
@@ -27,6 +27,7 @@
#include <linux/clk.h>
#include <mach/hardware.h>
+#include <asm/sched_clock.h>
#include <asm/mach/time.h>
#include <mach/common.h>
@@ -105,6 +106,11 @@ static void gpt_irq_acknowledge(void)
__raw_writel(V2_TSTAT_OF1, timer_base + V2_TSTAT);
}
+static cycle_t dummy_get_cycles(struct clocksource *cs)
+{
+ return 0;
+}
+
static cycle_t mx1_2_get_cycles(struct clocksource *cs)
{
return __raw_readl(timer_base + MX1_2_TCN);
@@ -118,18 +124,35 @@ static cycle_t v2_get_cycles(struct clocksource *cs)
static struct clocksource clocksource_mxc = {
.name = "mxc_timer1",
.rating = 200,
- .read = mx1_2_get_cycles,
+ .read = dummy_get_cycles,
.mask = CLOCKSOURCE_MASK(32),
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
};
+static DEFINE_CLOCK_DATA(cd);
+unsigned long long notrace sched_clock(void)
+{
+ cycle_t cyc = clocksource_mxc.read(&clocksource_mxc);
+
+ return cyc_to_sched_clock(&cd, cyc, (u32)~0);
+}
+
+static void notrace mxc_update_sched_clock(void)
+{
+ cycle_t cyc = clocksource_mxc.read(&clocksource_mxc);
+ update_sched_clock(&cd, cyc, (u32)~0);
+}
+
static int __init mxc_clocksource_init(struct clk *timer_clk)
{
unsigned int c = clk_get_rate(timer_clk);
if (timer_is_v2())
clocksource_mxc.read = v2_get_cycles;
+ else
+ clocksource_mxc.read = mx1_2_get_cycles;
+ init_sched_clock(&cd, mxc_update_sched_clock, 32, c);
clocksource_register_hz(&clocksource_mxc, c);
return 0;