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authorRichard Zhao <richard.zhao@freescale.com>2011-01-06 19:05:39 +0800
committerSascha Hauer <s.hauer@pengutronix.de>2011-01-07 15:20:52 +0100
commit14c6500e7547704255f94c63fc6016ae5cbed1c9 (patch)
tree8da665af82d969f8632fbe9781645331a91f844b /arch/arm/plat-mxc
parenta58154d1c3535f451a409abbd0bda6770b2d9380 (diff)
arm: mxc: move IOMUX_CONFIG_SION definition to iomux-v3.h
Signed-off-by: Richard Zhao <richard.zhao@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/plat-mxc')
-rw-r--r--arch/arm/plat-mxc/include/mach/iomux-mx53.h1
-rw-r--r--arch/arm/plat-mxc/include/mach/iomux-v3.h1
2 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx53.h b/arch/arm/plat-mxc/include/mach/iomux-mx53.h
index 5deee019c29..2673007d3eb 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx53.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx53.h
@@ -34,7 +34,6 @@ typedef enum iomux_config {
IOMUX_CONFIG_ALT6,
IOMUX_CONFIG_ALT7,
IOMUX_CONFIG_GPIO, /* added to help user use GPIO mode */
- IOMUX_CONFIG_SION = 0x1 << 4, /* LOOPBACK:MUX SION bit */
} iomux_pin_cfg_t;
/* These 2 defines are for pins that may not have a mux register, but could
diff --git a/arch/arm/plat-mxc/include/mach/iomux-v3.h b/arch/arm/plat-mxc/include/mach/iomux-v3.h
index 2277b01c855..82620af1922 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-v3.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-v3.h
@@ -105,6 +105,7 @@ typedef u64 iomux_v3_cfg_t;
#define PAD_CTL_SRE_FAST (1 << 0)
#define PAD_CTL_SRE_SLOW (0 << 0)
+#define IOMUX_CONFIG_SION (0x1 << 4)
#define MX51_NUM_GPIO_PORT 4